# Unit E1000

Description
Uses
Classes, Interfaces, Objects and Records
Functions and Procedures
Types
Constants
Variables

## Description

Driver->NetDev->`E1000` - Intel `E1000`/I217/82577LM Network Card Driver.

## Uses

- tracer
- console
- strings
- vmemorymanager
- lmemorymanager
- drivermanagement
- drivertypes
- util
- IDT
- PCI
- terminal
- net
- nettypes
- netutils
- isrmanager

## Overview

### Functions and Procedures

`procedure init();`
`function getMACAddress : puint8;`
`function sendPacket(p_data : void; p_len : uint16) : sint32;`
`function readStatus : uint32;`

### Types

`PE1000_rx_desc = ˆTE1000_rx_desc;`
`TE1000_rx_desc = bitpacked record address : uint64; length : uint16; checksum : uint16; status : uint8; errors : uint8; special : uint16; end;`
`PE1000_tx_desc = ˆTE1000_tx_desc;`
`TE1000_tx_desc = bitpacked record address : uint64; length : uint16; cso : uint8; cmd : uint8; status : uint8; css : uint8; special : uint16; end;`
`TCardType = (...);`

### Constants

`INTEL_VEND = $8086;`
`E1000_DEV = $100E;`
`I217_DEV = $153A;`
`LM82577_DEV = $10EA;`
`REG_CTRL = $0000;`
`REG_STATUS = $0008;`
`REG_EEPROM = $0014;`
`REG_CTRL_EXT = $0018;`
`REG_IMASK = $00D0;`
`REG_RCTRL = $0100;`
`REG_RXDESCLO = $2800;`
`REG_RXDESCHI = $2804;`
`REG_RXDESCLEN = $2808;`
`REG_RXDESCHEAD = $2810;`
`REG_RXDESCTAIL = $2818;`
`REG_TCTRL = $0400;`
`REG_TXDESCLO = $3800;`
`REG_TXDESCHI = $3804;`
`REG_TXDESCLEN = $3808;`
`REG_TXDESCHEAD = $3810;`
`REG_TXDESCTAIL = $3818;`
`REG_RDTR = $2820;`
`REG_RXDCTL = $3828;`
`REG_RADV = $282C;`
`REG_RSRPD = $2C00;`
`REG_TIPG = $0410;`
`ECTRL_SLU = $40;`
`RCTL_EN = (1 SHL 1);`
`RCTL_SBP = (1 SHL 2);`
`RCTL_UPE = (1 SHL 3);`
`RCTL_MPE = (1 SHL 4);`
`RCTL_LPE = (1 SHL 5);`
`RCTL_LBM_NONE = (0 SHL 6);`
`RCTL_LBM_PHY = (3 SHL 6);`
`RTCL_RDMTS_HALF = (0 SHL 8);`
`RTCL_RDMTS_QUARTER = (1 SHL 8);`
`RTCL_RDMTS_EIGHTH = (2 SHL 8);`
`RCTL_MO_36 = (0 SHL 12);`
`RCTL_MO_35 = (1 SHL 12);`
`RCTL_MO_34 = (2 SHL 12);`
`RCTL_MO_32 = (3 SHL 12);`
`RCTL_BAM = (1 SHL 15);`
`RCTL_VFE = (1 SHL 18);`
`RCTL_CFIEN = (1 SHL 19);`
`RCTL_CFI = (1 SHL 20);`
`RCTL_DPF = (1 SHL 22);`
`RCTL_PMCF = (1 SHL 23);`
`RCTL_SECRC = (1 SHL 26);`
`RCTL_BSIZE_256 = (3 SHL 16);`
`RCTL_BSIZE_512 = (2 SHL 16);`
`RCTL_BSIZE_1024 = (1 SHL 16);`
`RCTL_BSIZE_2048 = (0 SHL 16);`
`RCTL_BSIZE_4096 = ((3 SHL 16) OR (1 SHL 25));`
`RCTL_BSIZE_8192 = ((2 SHL 16) OR (1 SHL 25));`
`RCTL_BSIZE_16384 = ((1 SHL 16) OR (1 SHL 25));`
`CMD_EOP = (1 SHL 0);`
`CMD_IFCS = (1 SHL 1);`
`CMD_IC = (1 SHL 2);`
`CMD_RS = (1 SHL 3);`
`CMD_RPS = (1 SHL 4);`
`CMD_VLE = (1 SHL 6);`
`CMD_IDE = (1 SHL 7);`
`TCTL_EN = (1 SHL 1);`
`TCTL_PSP = (1 SHL 3);`
`TCTL_CT_SHIFT = 4;`
`TCTL_COLD_SHIFT = 12;`
`TCTL_SWXOFF = (1 SHL 22);`
`TCTL_RTLC = (1 SHL 24);`
`TSTA_DD = (1 SHL 0);`
`TSTA_EC = (1 SHL 1);`
`TSTA_LC = (1 SHL 2);`
`LSTA_TU = (1 SHL 3);`
`E1000_NUM_RX_DESC = 32;`
`E1000_NUM_TX_DESC = 8;`

## Description

### Functions and Procedures

`procedure init();`

`function getMACAddress : puint8;`

`function sendPacket(p_data : void; p_len : uint16) : sint32;`

`function readStatus : uint32;`

### Types

`PE1000_rx_desc = ˆTE1000_rx_desc;`

`TE1000_rx_desc = bitpacked record address : uint64; length : uint16; checksum : uint16; status : uint8; errors : uint8; special : uint16; end;`

`PE1000_tx_desc = ˆTE1000_tx_desc;`

`TE1000_tx_desc = bitpacked record address : uint64; length : uint16; cso : uint8; cmd : uint8; status : uint8; css : uint8; special : uint16; end;`

`TCardType = (...);`

###### Values

- ctUnknown
- ctE1000
- ctI217
- ct82577LM

### Constants

`INTEL_VEND = $8086;`

`E1000_DEV = $100E;`

`I217_DEV = $153A;`

`LM82577_DEV = $10EA;`

`REG_CTRL = $0000;`

`REG_STATUS = $0008;`

`REG_EEPROM = $0014;`

`REG_CTRL_EXT = $0018;`

`REG_IMASK = $00D0;`

`REG_RCTRL = $0100;`

`REG_RXDESCLO = $2800;`

`REG_RXDESCHI = $2804;`

`REG_RXDESCLEN = $2808;`

`REG_RXDESCHEAD = $2810;`

`REG_RXDESCTAIL = $2818;`

`REG_TCTRL = $0400;`

`REG_TXDESCLO = $3800;`

`REG_TXDESCHI = $3804;`

`REG_TXDESCLEN = $3808;`

`REG_TXDESCHEAD = $3810;`

`REG_TXDESCTAIL = $3818;`

`REG_RDTR = $2820;`

`REG_RXDCTL = $3828;`
RX Delay Timer Register

`REG_RADV = $282C;`
RX Descriptor Control

`REG_RSRPD = $2C00;`
RX Int. Absolute Delay Timer

`REG_TIPG = $0410;`
RX Small Packet Detect Interrupt

`ECTRL_SLU = $40;`
Transmit Inter Packet Gap

`RCTL_EN = (1 SHL 1);`
set link up

`RCTL_SBP = (1 SHL 2);`
Receiver Enable

`RCTL_UPE = (1 SHL 3);`
Store Bad Packets

`RCTL_MPE = (1 SHL 4);`
Unicast Promiscuous Enabled

`RCTL_LPE = (1 SHL 5);`
Multicast Promiscuous Enabled

`RCTL_LBM_NONE = (0 SHL 6);`
Long Packet Reception Enable

`RCTL_LBM_PHY = (3 SHL 6);`
No Loopback

`RTCL_RDMTS_HALF = (0 SHL 8);`
PHY or external SerDesc loopback

`RTCL_RDMTS_QUARTER = (1 SHL 8);`
Free Buffer Threshold is 1/2 of RDLEN

`RTCL_RDMTS_EIGHTH = (2 SHL 8);`
Free Buffer Threshold is 1/4 of RDLEN

`RCTL_MO_36 = (0 SHL 12);`
Free Buffer Threshold is 1/8 of RDLEN

`RCTL_MO_35 = (1 SHL 12);`
Multicast Offset - bits 47:36

`RCTL_MO_34 = (2 SHL 12);`
Multicast Offset - bits 46:35

`RCTL_MO_32 = (3 SHL 12);`
Multicast Offset - bits 45:34

`RCTL_BAM = (1 SHL 15);`
Multicast Offset - bits 43:32

`RCTL_VFE = (1 SHL 18);`
Broadcast Accept Mode

`RCTL_CFIEN = (1 SHL 19);`
VLAN Filter Enable

`RCTL_CFI = (1 SHL 20);`
Canonical Form Indicator Enable

`RCTL_DPF = (1 SHL 22);`
Canonical Form Indicator Bit Value

`RCTL_PMCF = (1 SHL 23);`
Discard Pause Frames

`RCTL_SECRC = (1 SHL 26);`
Pass MAC Control Frames

`RCTL_BSIZE_256 = (3 SHL 16);`
Strip Ethernet CRC Buffer Sizes

`RCTL_BSIZE_512 = (2 SHL 16);`

`RCTL_BSIZE_1024 = (1 SHL 16);`

`RCTL_BSIZE_2048 = (0 SHL 16);`

`RCTL_BSIZE_4096 = ((3 SHL 16) OR (1 SHL 25));`

`RCTL_BSIZE_8192 = ((2 SHL 16) OR (1 SHL 25));`

`RCTL_BSIZE_16384 = ((1 SHL 16) OR (1 SHL 25));`

`CMD_EOP = (1 SHL 0);`
Transmit Command

`CMD_IFCS = (1 SHL 1);`
End of Packet

`CMD_IC = (1 SHL 2);`
Insert FCS

`CMD_RS = (1 SHL 3);`
Insert Checksum

`CMD_RPS = (1 SHL 4);`
Report Status

`CMD_VLE = (1 SHL 6);`
Report Packet Sent

`CMD_IDE = (1 SHL 7);`
VLAN Packet Enable

`TCTL_EN = (1 SHL 1);`
Interrupt Delay Enable TCTL Register

`TCTL_PSP = (1 SHL 3);`
Transmit Enable

`TCTL_CT_SHIFT = 4;`
Pad Short Packets

`TCTL_COLD_SHIFT = 12;`
Collision Threshold

`TCTL_SWXOFF = (1 SHL 22);`
Collision Distance

`TCTL_RTLC = (1 SHL 24);`
Software XOFF Transmission

`TSTA_DD = (1 SHL 0);`
Re-transmit on Late Collision

`TSTA_EC = (1 SHL 1);`
Descriptor Done

`TSTA_LC = (1 SHL 2);`
Excess Collisions

`LSTA_TU = (1 SHL 3);`
Late Collision

`E1000_NUM_RX_DESC = 32;`
Transmit Underrun

`E1000_NUM_TX_DESC = 8;`

## Author

- Kieron Morris <kjm@kieronmorris.me>

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