git-svn-id: https://spexeah.com:8443/svn/Asuro@369 6dbc8c32-bb84-406f-8558-d1cf31a0ab0c
This commit is contained in:
parent
bd04e04b34
commit
20935bc0f5
@ -120,10 +120,10 @@ begin
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for slot := 0 to 31 do begin
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for slot := 0 to 31 do begin
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result := loadDeviceConfig(bus, slot, 0);
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result := loadDeviceConfig(bus, slot, 0);
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if result = true then begin
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if result = true then begin
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if devices[device_count - 1].header_type and $40 = 40 then begin
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if devices[device_count - 1].header_type and $80 <> 0 then begin
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for func := 1 to 8 do begin
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for func := 1 to 8 do begin
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loadDeviceConfig(bus, slot, func);
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loadDeviceConfig(bus, slot, func);
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psleep(1000);
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psleep(10);
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end;
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end;
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end;
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end;
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end;
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end;
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@ -7,7 +7,7 @@
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* Contributors:
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* Contributors:
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************************************************ }
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************************************************ }
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unit AHCI;
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unit AHCI_OLD;
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interface
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interface
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@ -18,7 +18,8 @@ uses
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drivermanagement,
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drivermanagement,
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lmemorymanager,
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lmemorymanager,
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console,
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console,
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vmemorymanager;
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vmemorymanager,
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terminal;
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type
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type
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@ -195,9 +196,9 @@ type
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PCommand_Table = ^TCommand_Table;
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PCommand_Table = ^TCommand_Table;
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TCommand_Table = bitpacked record
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TCommand_Table = bitpacked record
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cfis : array[0..64] of uint8;
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cfis : TFIS_REG_H2D;
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acmd : array[0..16] of uint8;
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acmd : array[0..15] of uint8;
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rsv : array[0..48] of uint8;
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rsv : array[0..47] of uint8;
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prdt : array[0..7] of TPRD_Entry;
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prdt : array[0..7] of TPRD_Entry;
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end;
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end;
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@ -227,9 +228,15 @@ function load(ptr:void): boolean;
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function read(port : uint8; startl : uint32; starth : uint32; count : uint32; buf : PuInt32) : boolean;
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function read(port : uint8; startl : uint32; starth : uint32; count : uint32; buf : PuInt32) : boolean;
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function write(port : uint8; startl : uint32; starth : uint32; count : uint32; buf : PuInt32) : boolean;
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function write(port : uint8; startl : uint32; starth : uint32; count : uint32; buf : PuInt32) : boolean;
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function find_cmd_slot(port : uint8) : uint32;
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function find_cmd_slot(port : uint8) : uint32;
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procedure test(value : uint32);
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implementation
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implementation
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procedure test_command(params : PParamList);
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begin
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test(65534);
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end;
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procedure init();
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procedure init();
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var
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var
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devID : TDeviceIdentifier;
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devID : TDeviceIdentifier;
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@ -240,13 +247,15 @@ begin
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devID.id1:= $00000001;
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devID.id1:= $00000001;
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devID.id2:= $00000006;
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devID.id2:= $00000006;
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devID.id3:= $00000001;
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devID.id3:= $00000001;
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devID.id4:= idANY;
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devID.ex:= nil;
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devID.ex:= nil;
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drivermanagement.register_driver('AHCI Controller', @devID, @load);
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drivermanagement.register_driver('AHCI Controller', @devID, @load);
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terminal.registerCommand('AHCI', @test_command, 'TEST ACHI');
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end;
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end;
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function load(ptr : void) : boolean;
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function load(ptr : void) : boolean;
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begin
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begin
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ahciController := ptr;
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ahciController := ptr + KERNEL_VIRTUAL_BASE;
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hba := THBAptr(PPCI_Device(ahciController)^.address5);
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hba := THBAptr(PPCI_Device(ahciController)^.address5);
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new_page_at_address(uint32(hba));
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new_page_at_address(uint32(hba));
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new_page_at_address(AHCI_BASE);
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new_page_at_address(AHCI_BASE);
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@ -307,7 +316,7 @@ begin
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hba^.ports[port].fbu := 0;
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hba^.ports[port].fbu := 0;
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memset(hba^.ports[port].fb, 0, 256);
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memset(hba^.ports[port].fb, 0, 256);
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cmdheader := PCMDHeader(hba^.ports[port].clb);
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cmdheader := PCMDHeader(hba^.ports[port].clb + KERNEL_VIRTUAL_BASE);
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for i:= 0 to 31 do begin
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for i:= 0 to 31 do begin
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cmdHeader[i].PRDTL := 8; // no of prdt entries per cmd table
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cmdHeader[i].PRDTL := 8; // no of prdt entries per cmd table
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cmdheader[i].ctba := AHCI_BASE + (40 shl 10) + (port shl 13) + (i shl 8);
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cmdheader[i].ctba := AHCI_BASE + (40 shl 10) + (port shl 13) + (i shl 8);
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@ -328,21 +337,21 @@ var
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spin : uint32 = 0;
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spin : uint32 = 0;
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begin
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begin
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console.writestringln('1');
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console.writestringln('1');
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pport := @hba^.ports[port];
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pport := PHBA_PORT(@hba^.ports[port] + KERNEL_VIRTUAL_BASE);
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//new_page_at_address(uint32(pport));
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//new_page_at_address(uint32(pport));
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pport^.istat := $ffff;
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pport^.istat := $ffff;
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slot := find_cmd_slot(port);
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slot := find_cmd_slot(port);
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if slot = -1 then exit(false);
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if slot = -1 then exit(false);
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console.writestringln('2');
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console.writestringln('2');
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cmdHeader := @pport^.clb;
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cmdHeader := PCMDHeader(@pport^.clb + KERNEL_VIRTUAL_BASE);
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//new_page_at_address(uint32(cmdHeader));
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//new_page_at_address(uint32(cmdHeader));
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cmdHeader += slot;
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cmdHeader += slot;
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cmdHeader^.w := false;
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cmdHeader^.w := false;
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cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1);
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cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1);
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console.writestringln('3');
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console.writestringln('3');
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cmdTable := @cmdheader^.ctba;
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cmdTable := PCommand_Table(@cmdheader^.ctba + KERNEL_VIRTUAL_BASE);
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//new_page_at_address(uint32(cmdTable));
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//new_page_at_address(uint32(cmdTable));
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memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
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memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
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@ -364,7 +373,7 @@ begin
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console.writestringln('6');
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console.writestringln('6');
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//setup command
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//setup command
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cmdfis := @cmdTable^.cfis;
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cmdfis := PFIS_REG_H2D(@cmdTable^.cfis + KERNEL_VIRTUAL_BASE);
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new_page_at_address(uint32(cmdfis));
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new_page_at_address(uint32(cmdfis));
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cmdfis^.coc := true;
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cmdfis^.coc := true;
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cmdfis^.command := $25;
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cmdfis^.command := $25;
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@ -391,8 +400,8 @@ begin
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end;
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end;
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console.writestringln('9');
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console.writestringln('9');
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//pport^.ci := 1 shl slot;
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pport^.ci := 1 shl slot;
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pport^.ci := 1;
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//pport^.ci := 1;
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console.writestringln('10');
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console.writestringln('10');
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while true do begin
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while true do begin
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@ -426,33 +435,51 @@ var
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i : uint32;
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i : uint32;
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spin : uint32 = 0;
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spin : uint32 = 0;
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begin
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begin
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//console.writeintln(sizeof(TCommand_Table));
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//console.writeintln(sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
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//psleep(1000);
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console.writestringln('1');
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console.writestringln('1');
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pport := @hba^.ports[port];
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//pport := PHBA_PORT(@hba^.ports[port] + KERNEL_VIRTUAL_BASE);
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new_page_at_address(uint32(pport));
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//new_page_at_address(uint32(pport));
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pport^.istat := $ffff;
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console.writestringln('1.1');
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console.writehexln(uint32(hba));
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hba^.ports[port].istat := $ffff;
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console.writestringln('1.2');
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slot := find_cmd_slot(port);
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slot := find_cmd_slot(port);
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console.writestringln('1.3');
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if slot = -1 then exit(false);
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if slot = -1 then exit(false);
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console.writestringln('2');
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console.writestringln('2');
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cmdHeader := @pport^.clb;
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cmdHeader := PCMDHeader(hba^.ports[port].clb + KERNEL_VIRTUAL_BASE);
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cmdHeader += slot;
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cmdHeader += slot;
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// new_page_at_address(uint32(cmdHeader));
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// new_page_at_address(uint32(cmdHeader));
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cmdHeader^.w := false;
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cmdHeader^.w := false;
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cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1);
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cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1);
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console.writeintln(cmdHeader^.PRDTL); // different value on differnt emulators????
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console.writestringln('3');
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console.writestringln('3');
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cmdTable := @cmdheader^.ctba;
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cmdTable := PCommand_Table(cmdheader^.ctba);
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// new_page_at_address(uint32(cmdTable));
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// new_page_at_address(uint32(cmdTable));
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// new_page_at_address(uint32(@cmdTable^.prdt));
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// new_page_at_address(uint32(@cmdTable^.prdt));
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memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
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console.writehexln(uint32(cmdTable));
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kpalloc(uint32(cmdTable));
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memset(uint32(cmdTable), 0, sizeof(TCommand_Table));
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console.writestringln('4');
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console.writestringln('4');
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console.writestring('PRDTL: ');
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console.writestring('PRDTL: ');
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console.writeintln(cmdHeader^.PRDTL);
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console.writeintln(cmdHeader^.PRDTL);
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if cmdHeader^.PRDTL > 0 then begin
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if cmdHeader^.PRDTL > 0 then begin
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console.writestringln('4.1');
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for i:= 0 to cmdHeader^.PRDTL -1 do begin
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for i:= 0 to cmdHeader^.PRDTL -1 do begin
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console.writestring('PRDTL: ');
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console.writeintln(cmdHeader^.PRDTL - 1);
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console.writestring('i: ');
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console.writeintln(i);
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console.writestringln('4.2');
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console.writehexln(uint32(cmdTable));
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cmdTable^.prdt[i].data_base_address := uint32(buf);
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cmdTable^.prdt[i].data_base_address := uint32(buf);
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console.writestringln('4.3');
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cmdTable^.prdt[i].data_byte_count := 8*1024-1;
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cmdTable^.prdt[i].data_byte_count := 8*1024-1;
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console.writestringln('4.4');
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cmdTable^.prdt[i].interrupt_oc := false;
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cmdTable^.prdt[i].interrupt_oc := false;
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buf += 4*1024;
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buf += 4*1024;
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count -= 16;
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count -= 16;
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@ -467,24 +494,24 @@ begin
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cmdTable^.prdt[cmdHeader^.PRDTL].interrupt_oc := false;
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cmdTable^.prdt[cmdHeader^.PRDTL].interrupt_oc := false;
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console.writestringln('6');
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console.writestringln('6');
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cmdfis := @cmdTable^.cfis;
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//cmdfis := PFIS_REG_H2D(@cmdTable^.cfis);
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new_page_at_address(uint32(cmdfis));
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//new_page_at_address(uint32(cmdfis));
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cmdfis^.coc := true;
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cmdTable^.cfis.coc := true;
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cmdfis^.command := $35;
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cmdTable^.cfis.command := $35;
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cmdfis^.lba0 := uint8(startl);
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cmdTable^.cfis.lba0 := uint8(startl);
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cmdfis^.lba1 := uint8(startl shr 8);
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cmdTable^.cfis.lba1 := uint8(startl shr 8);
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cmdfis^.lba2 := uint8(startl shr 16);
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cmdTable^.cfis.lba2 := uint8(startl shr 16);
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cmdfis^.device := 1 shl 6;
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cmdTable^.cfis.device := 1 shl 6;
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cmdfis^.lba3 := uint8(startl shr 24);
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cmdTable^.cfis.lba3 := uint8(startl shr 24);
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cmdfis^.lba4 := uint8(starth);
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cmdTable^.cfis.lba4 := uint8(starth);
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cmdfis^.lba3 := uint8(starth shr 8);
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cmdTable^.cfis.lba3 := uint8(starth shr 8);
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cmdfis^.count_low := count and $FF;
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cmdTable^.cfis.count_low := count and $FF;
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cmdfis^.count_high:= (count shr 8) and $FF;
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cmdTable^.cfis.count_high:= (count shr 8) and $FF;
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console.writestringln('7');
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console.writestringln('7');
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// while (pport^.tfd and $88) and spin < 1000000 do begin
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while (hba^.ports[port].tfd and $88) and spin < 1000000 do begin
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// spin += 1;
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spin += 1;
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// end;
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end;
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console.writestringln('8');
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console.writestringln('8');
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if spin = 1000000 then begin
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if spin = 1000000 then begin
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@ -494,13 +521,13 @@ begin
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end;
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end;
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console.writestringln('9');
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console.writestringln('9');
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//pport^.ci := 1 shl slot;
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hba^.ports[port].ci := 1 shl slot;
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pport^.ci := 1;
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//hba^.ports[port].ci := 1;
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console.writestringln('10');
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console.writestringln('10');
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while true do begin
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while true do begin
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if(pport^.ci and (1 shl slot)) = (1 shl slot) then break;
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if(hba^.ports[port].ci and (1 shl slot)) = (1 shl slot) then break;
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if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin
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if(hba^.ports[port].istat and (1 shl 30)) = (1 shl 30) then begin
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console.writestringln('AHCI controller: Disk write error!');
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console.writestringln('AHCI controller: Disk write error!');
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write:= false;
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write:= false;
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exit;
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exit;
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@ -508,7 +535,7 @@ begin
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end;
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end;
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console.writestringln('11');
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console.writestringln('11');
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if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin
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if(hba^.ports[port].istat and (1 shl 30)) = (1 shl 30) then begin
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console.writestringln('AHCI controller: Disk write error!');
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console.writestringln('AHCI controller: Disk write error!');
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write:= false;
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write:= false;
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exit;
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exit;
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@ -535,5 +562,17 @@ begin
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exit(-1);
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exit(-1);
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end;
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end;
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procedure test(value : uint32);
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var
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thing : PuInt32;
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begin
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thing:= Puint32(kalloc(1024*16));
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thing^:= value;
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write(0, $1, $0, 6, puint32(thing - KERNEL_VIRTUAL_BASE) );
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thing^:= 365;
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read(0, $1, $0, 6, puint32(thing - KERNEL_VIRTUAL_BASE) );
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console.writeintln(thing^);
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end;
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end.
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end.
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@ -0,0 +1,156 @@
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{ ************************************************
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* Asuro
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* Unit: Drivers/storage/IDE
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* Description: IDE ATA Driver
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*
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************************************************
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* Author: Aaron Hance
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* Contributors:
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************************************************ }
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unit ATA;
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interface
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uses
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util,
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drivertypes,
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console,
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terminal,
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isr76,
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drivermanagment,
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vmemorymanager,
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util;
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type
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TIDE_Channel_Registers = record
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base : uint16;
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ctrl : uint16;
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bmide : uint16;
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noInter : uint8
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end;
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TIDE_Device = record
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exists : boolean;
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isPrimary : boolean;
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isMaster : boolean;
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isATAPI : boolean;
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signature : uint16;
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capabilities : uint16;
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commandSets : uint32;
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size : uint32;
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model : array[0..40] of uint8;
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end;
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const
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ATA_SR_BUSY = $80; //BUSY
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ATA_SR_DRDY = $40; //DRIVE READY
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ATA_SR_DF = $20; //DRIVE WRITE FAULT
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ATA_SR_DSC = $10; //DRIVE SEEK COMPLETE
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ATA_SR_DRQ = $08; //DATA REQUEST READY
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ATA_SR_CORR = $04; //CORRECTED DATA
|
||||||
|
ATA_SR_IDX = $02; //INLEX
|
||||||
|
ATA_SR_ERR = $01; //ERROR
|
||||||
|
|
||||||
|
ATA_ER_BBK = $80; //BAD SECTOR
|
||||||
|
ATA_ER_UNC = $40; //UNCORRECTABLE DATA
|
||||||
|
ATA_ER_MC = $20; //NO MEDIA
|
||||||
|
ATA_ER_IDNF = $10; //ID MARK NOT FOUND
|
||||||
|
ATA_ER_MCR = $08; //NO MEDIA
|
||||||
|
ATA_ER_ABRT = $04; //COMMAND ABORTED
|
||||||
|
ATA_ER_TK0NF = $02; //TRACK 0 NOT FOUND
|
||||||
|
ATA_ER_AMNF = $01; //NO ADDRESS MARK
|
||||||
|
|
||||||
|
ATA_CMD_READ_PIO = $20;
|
||||||
|
ATA_CMD_READ_PIO_EXT = $24;
|
||||||
|
ATA_CMD_READ_DMA = $C8;
|
||||||
|
ATA_CMD_READ_DMA_EXT = $25;
|
||||||
|
ATA_CMD_WRITE_PIO = $30;
|
||||||
|
ATA_CMD_WRITE_PIO_EXT = $34;
|
||||||
|
ATA_CMD_WRITE_DMA = $CA;
|
||||||
|
ATA_CMD_WRITE_DMA_EXT = $35;
|
||||||
|
ATA_CMD_CACHE_FLUSH = $E7;
|
||||||
|
ATA_CMD_CACHE_FLUSH_EXT = $EA;
|
||||||
|
ATA_CMD_PACKET = $A0;
|
||||||
|
ATA_CMD_IDENTIFY_PACKET = $A1;
|
||||||
|
ATA_CMD_IDENTIFY = $EC;
|
||||||
|
|
||||||
|
ATAPI_CMD_READ = $A8;
|
||||||
|
ATAPI_CMD_EJECT = $1B;
|
||||||
|
|
||||||
|
ATA_IDENT_DEVICETYPE = $0;
|
||||||
|
ATA_IDENT_CYLINDERS = $2;
|
||||||
|
ATA_IDENT_HEADS = $6;
|
||||||
|
ATA_IDENT_SECOTRS = $12;
|
||||||
|
ATA_IDENT_SERIAL = $20;
|
||||||
|
ATA_IDENT_MODEL = $54;
|
||||||
|
ATA_IDENT_CAPABILITIES = $98;
|
||||||
|
ATA_IDENT_FIELDVALID = $106;
|
||||||
|
ATA_IDENT_MAX_LBA = $120;
|
||||||
|
ATA_IDENT_COMMANDSETS = $164;
|
||||||
|
ATA_IDENT_MAX_LBA_EXT = $200;
|
||||||
|
|
||||||
|
ATA_REG_DATA = $00;
|
||||||
|
ATA_REG_ERROR = $01;
|
||||||
|
ATA_REG_FEATURES = $01;
|
||||||
|
ATA_REG_SECCOUNT0 = $02;
|
||||||
|
ATA_REG_LBA0 = $03;
|
||||||
|
ATA_REG_LBA1 = $04;
|
||||||
|
ATA_REG_LBA2 = $05;
|
||||||
|
ATA_REG_HDDEVSEL = $06;
|
||||||
|
ATA_REG_COMMAND = $07;
|
||||||
|
ATA_REG_STATUS = $07;
|
||||||
|
ATA_REG_SECCOUNT1 = $08;
|
||||||
|
ATA_REG_LBA3 = $09;
|
||||||
|
ATA_REG_LBA4 = $0A;
|
||||||
|
ATA_REG_LBA5 = $0B;
|
||||||
|
ATA_REG_CONTROL = $0C;
|
||||||
|
ATA_REG_ALTSTATUS = $0C;
|
||||||
|
ATA_REG_DEVADDRESS = $0D;
|
||||||
|
|
||||||
|
var
|
||||||
|
controller : TPCI_Device;
|
||||||
|
|
||||||
|
bar0 : uint32;
|
||||||
|
bar1 : uint32;
|
||||||
|
bar2 : uint32;
|
||||||
|
bar3 : uint32;
|
||||||
|
bar4 : uint32;
|
||||||
|
|
||||||
|
IDEDevices : array[0..3] of TIDE_Device;
|
||||||
|
|
||||||
|
procedure init;
|
||||||
|
function load(ptr : void) : boolean;
|
||||||
|
|
||||||
|
implementation
|
||||||
|
|
||||||
|
procedure init;
|
||||||
|
var
|
||||||
|
devID : PDeviceIdentifier;
|
||||||
|
begin
|
||||||
|
console.writestringln('IDE ATA Driver: Init()');
|
||||||
|
devID.bus:= biPCI;
|
||||||
|
devID.id0:= idANY;
|
||||||
|
devID.id1:= $00000001;
|
||||||
|
devID.id2:= $00000001;
|
||||||
|
devID.id3:= idANY;
|
||||||
|
devID.id4:= idANY;
|
||||||
|
devID.ex:= nil;
|
||||||
|
drivermanagment.register_driver('IDE ATA Driver', @devID, @load);
|
||||||
|
end;
|
||||||
|
|
||||||
|
function load(ptr : void) : boolean;
|
||||||
|
begin
|
||||||
|
controller := PPCI_Device(ptr);
|
||||||
|
|
||||||
|
bar0 := controller^.address0;
|
||||||
|
bar1 := controller^.address1;
|
||||||
|
bar2 := controller^.address2;
|
||||||
|
bar3 := controller^.address3;
|
||||||
|
bar4 := controller^.address4;
|
||||||
|
|
||||||
|
//setup channels
|
||||||
|
end;
|
||||||
|
|
||||||
|
|
||||||
|
end.
|
@ -34,7 +34,8 @@ uses
|
|||||||
strings,
|
strings,
|
||||||
USB,
|
USB,
|
||||||
testdriver,
|
testdriver,
|
||||||
E1000;
|
E1000,
|
||||||
|
AHCI_OLD;
|
||||||
|
|
||||||
procedure kmain(mbinfo: Pmultiboot_info_t; mbmagic: uint32); stdcall;
|
procedure kmain(mbinfo: Pmultiboot_info_t; mbmagic: uint32); stdcall;
|
||||||
|
|
||||||
@ -125,6 +126,8 @@ begin
|
|||||||
mouse.init();
|
mouse.init();
|
||||||
testdriver.init();
|
testdriver.init();
|
||||||
E1000.init();
|
E1000.init();
|
||||||
|
//AHCI_OLD.init();
|
||||||
|
//Nothing beyond here
|
||||||
USB.init();
|
USB.init();
|
||||||
pci.init();
|
pci.init();
|
||||||
console.writestringln('DRIVERS: INIT END.');
|
console.writestringln('DRIVERS: INIT END.');
|
||||||
|
@ -129,13 +129,13 @@ begin
|
|||||||
end else begin
|
end else begin
|
||||||
PhysicalMemory[block].Allocated:= True;
|
PhysicalMemory[block].Allocated:= True;
|
||||||
PhysicalMemory[block].MappedTo:= caller;
|
PhysicalMemory[block].MappedTo:= caller;
|
||||||
console.writestring('PMM: 4MiB Block Allocated @ ');
|
// console.writestring('PMM: 4MiB Block Allocated @ ');
|
||||||
console.writeword(block);
|
// console.writeword(block);
|
||||||
console.writestring(' [');
|
// console.writestring(' [');
|
||||||
console.writehex(block SHL 22);
|
// console.writehex(block SHL 22);
|
||||||
console.writestring(' - ');
|
// console.writestring(' - ');
|
||||||
console.writehex(((block+1) SHL 22));
|
// console.writehex(((block+1) SHL 22));
|
||||||
console.writestringln(']');
|
// console.writestringln(']');
|
||||||
alloc_block:= true;
|
alloc_block:= true;
|
||||||
end;
|
end;
|
||||||
end else begin
|
end else begin
|
||||||
|
@ -112,22 +112,22 @@ begin
|
|||||||
PD^[page_number].PageSize:= true;
|
PD^[page_number].PageSize:= true;
|
||||||
PD^[page_number].Writable:= true;
|
PD^[page_number].Writable:= true;
|
||||||
|
|
||||||
// console.writestringln('VMM: New Page Added:');
|
console.writestringln('VMM: New Page Added:');
|
||||||
|
|
||||||
// console.writestring('VMM: - P:');
|
console.writestring('VMM: - P:');
|
||||||
// console.writehex(page_number);
|
console.writehex(page_number);
|
||||||
// console.writestring('-->B:');
|
console.writestring('-->B:');
|
||||||
// console.writehexln(block);
|
console.writehexln(block);
|
||||||
|
|
||||||
// console.writestring('VMM: - P:[');
|
console.writestring('VMM: - P:[');
|
||||||
// console.writehex(page_number SHL 22);
|
console.writehex(page_number SHL 22);
|
||||||
// console.writestring(' - ');
|
console.writestring(' - ');
|
||||||
// console.writehex(((page_number+1) SHL 22));
|
console.writehex(((page_number+1) SHL 22));
|
||||||
// console.writestring(']-->B:[');
|
console.writestring(']-->B:[');
|
||||||
// console.writehex(block SHL 22);
|
console.writehex(block SHL 22);
|
||||||
// console.writestring(' - ');
|
console.writestring(' - ');
|
||||||
// console.writehex(((block+1) SHL 22));
|
console.writehex(((block+1) SHL 22));
|
||||||
// console.writestringln(']');
|
console.writestringln(']');
|
||||||
|
|
||||||
map_page_ex:= true;
|
map_page_ex:= true;
|
||||||
end;
|
end;
|
||||||
|
Loading…
x
Reference in New Issue
Block a user