Spexeah/Asuro
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git-svn-id: https://spexeah.com:8443/svn/Asuro@369 6dbc8c32-bb84-406f-8558-d1cf31a0ab0c

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This commit is contained in:
aaron 2018-04-07 13:01:28 +00:00
parent bd04e04b34
commit 20935bc0f5
6 changed files with 263 additions and 65 deletions
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4
src/driver/PCI.pas
View File

@ -120,10 +120,10 @@ begin
for slot := 0 to 31 do begin
result := loadDeviceConfig(bus, slot, 0);
if result = true then begin
if devices[device_count - 1].header_type and $40 = 40 then begin
if devices[device_count - 1].header_type and $80 <> 0 then begin
for func := 1 to 8 do begin
loadDeviceConfig(bus, slot, func);
psleep(1000);
psleep(10);
end;
end;
end;

121
src/driver/storage/AHCI_OLD.pas
View File

@ -7,7 +7,7 @@
* Contributors:
************************************************ }
unit AHCI;
unit AHCI_OLD;
interface
@ -18,7 +18,8 @@ uses
drivermanagement,
lmemorymanager,
console,
vmemorymanager;
vmemorymanager,
terminal;
type
@ -195,9 +196,9 @@ type
PCommand_Table = ^TCommand_Table;
TCommand_Table = bitpacked record
cfis : array[0..64] of uint8;
acmd : array[0..16] of uint8;
rsv : array[0..48] of uint8;
cfis : TFIS_REG_H2D;
acmd : array[0..15] of uint8;
rsv : array[0..47] of uint8;
prdt : array[0..7] of TPRD_Entry;
end;
@ -227,9 +228,15 @@ function load(ptr:void): boolean;
function read(port : uint8; startl : uint32; starth : uint32; count : uint32; buf : PuInt32) : boolean;
function write(port : uint8; startl : uint32; starth : uint32; count : uint32; buf : PuInt32) : boolean;
function find_cmd_slot(port : uint8) : uint32;
procedure test(value : uint32);
implementation
procedure test_command(params : PParamList);
begin
test(65534);
end;
procedure init();
var
devID : TDeviceIdentifier;
@ -240,13 +247,15 @@ begin
devID.id1:= $00000001;
devID.id2:= $00000006;
devID.id3:= $00000001;
devID.id4:= idANY;
devID.ex:= nil;
drivermanagement.register_driver('AHCI Controller', @devID, @load);
terminal.registerCommand('AHCI', @test_command, 'TEST ACHI');
end;
function load(ptr : void) : boolean;
begin
ahciController := ptr;
ahciController := ptr + KERNEL_VIRTUAL_BASE;
hba := THBAptr(PPCI_Device(ahciController)^.address5);
new_page_at_address(uint32(hba));
new_page_at_address(AHCI_BASE);
@ -307,7 +316,7 @@ begin
hba^.ports[port].fbu := 0;
memset(hba^.ports[port].fb, 0, 256);
cmdheader := PCMDHeader(hba^.ports[port].clb);
cmdheader := PCMDHeader(hba^.ports[port].clb + KERNEL_VIRTUAL_BASE);
for i:= 0 to 31 do begin
cmdHeader[i].PRDTL := 8; // no of prdt entries per cmd table
cmdheader[i].ctba := AHCI_BASE + (40 shl 10) + (port shl 13) + (i shl 8);
@ -328,21 +337,21 @@ var
spin : uint32 = 0;
begin
console.writestringln('1');
pport := @hba^.ports[port];
pport := PHBA_PORT(@hba^.ports[port] + KERNEL_VIRTUAL_BASE);
//new_page_at_address(uint32(pport));
pport^.istat := $ffff;
slot := find_cmd_slot(port);
if slot = -1 then exit(false);
console.writestringln('2');
cmdHeader := @pport^.clb;
cmdHeader := PCMDHeader(@pport^.clb + KERNEL_VIRTUAL_BASE);
//new_page_at_address(uint32(cmdHeader));
cmdHeader += slot;
cmdHeader^.w := false;
cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1);
console.writestringln('3');
cmdTable := @cmdheader^.ctba;
cmdTable := PCommand_Table(@cmdheader^.ctba + KERNEL_VIRTUAL_BASE);
//new_page_at_address(uint32(cmdTable));
memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
@ -364,7 +373,7 @@ begin
console.writestringln('6');
//setup command
cmdfis := @cmdTable^.cfis;
cmdfis := PFIS_REG_H2D(@cmdTable^.cfis + KERNEL_VIRTUAL_BASE);
new_page_at_address(uint32(cmdfis));
cmdfis^.coc := true;
cmdfis^.command := $25;
@ -391,8 +400,8 @@ begin
end;
console.writestringln('9');
//pport^.ci := 1 shl slot;
pport^.ci := 1;
pport^.ci := 1 shl slot;
//pport^.ci := 1;
console.writestringln('10');
while true do begin
@ -426,33 +435,51 @@ var
i : uint32;
spin : uint32 = 0;
begin
//console.writeintln(sizeof(TCommand_Table));
//console.writeintln(sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
//psleep(1000);
console.writestringln('1');
pport := @hba^.ports[port];
new_page_at_address(uint32(pport));
pport^.istat := $ffff;
//pport := PHBA_PORT(@hba^.ports[port] + KERNEL_VIRTUAL_BASE);
//new_page_at_address(uint32(pport));
console.writestringln('1.1');
console.writehexln(uint32(hba));
hba^.ports[port].istat := $ffff;
console.writestringln('1.2');
slot := find_cmd_slot(port);
console.writestringln('1.3');
if slot = -1 then exit(false);
console.writestringln('2');
cmdHeader := @pport^.clb;
cmdHeader := PCMDHeader(hba^.ports[port].clb + KERNEL_VIRTUAL_BASE);
cmdHeader += slot;
// new_page_at_address(uint32(cmdHeader));
cmdHeader^.w := false;
cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1);
console.writeintln(cmdHeader^.PRDTL); // different value on differnt emulators????
console.writestringln('3');
cmdTable := @cmdheader^.ctba;
cmdTable := PCommand_Table(cmdheader^.ctba);
// new_page_at_address(uint32(cmdTable));
// new_page_at_address(uint32(@cmdTable^.prdt));
memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
console.writehexln(uint32(cmdTable));
kpalloc(uint32(cmdTable));
memset(uint32(cmdTable), 0, sizeof(TCommand_Table));
console.writestringln('4');
console.writestring('PRDTL: ');
console.writeintln(cmdHeader^.PRDTL);
if cmdHeader^.PRDTL > 0 then begin
console.writestringln('4.1');
for i:= 0 to cmdHeader^.PRDTL -1 do begin
console.writestring('PRDTL: ');
console.writeintln(cmdHeader^.PRDTL - 1);
console.writestring('i: ');
console.writeintln(i);
console.writestringln('4.2');
console.writehexln(uint32(cmdTable));
cmdTable^.prdt[i].data_base_address := uint32(buf);
console.writestringln('4.3');
cmdTable^.prdt[i].data_byte_count := 8*1024-1;
console.writestringln('4.4');
cmdTable^.prdt[i].interrupt_oc := false;
buf += 4*1024;
count -= 16;
@ -467,24 +494,24 @@ begin
cmdTable^.prdt[cmdHeader^.PRDTL].interrupt_oc := false;
console.writestringln('6');
cmdfis := @cmdTable^.cfis;
new_page_at_address(uint32(cmdfis));
cmdfis^.coc := true;
cmdfis^.command := $35;
cmdfis^.lba0 := uint8(startl);
cmdfis^.lba1 := uint8(startl shr 8);
cmdfis^.lba2 := uint8(startl shr 16);
cmdfis^.device := 1 shl 6;
cmdfis^.lba3 := uint8(startl shr 24);
cmdfis^.lba4 := uint8(starth);
cmdfis^.lba3 := uint8(starth shr 8);
cmdfis^.count_low := count and $FF;
cmdfis^.count_high:= (count shr 8) and $FF;
//cmdfis := PFIS_REG_H2D(@cmdTable^.cfis);
//new_page_at_address(uint32(cmdfis));
cmdTable^.cfis.coc := true;
cmdTable^.cfis.command := $35;
cmdTable^.cfis.lba0 := uint8(startl);
cmdTable^.cfis.lba1 := uint8(startl shr 8);
cmdTable^.cfis.lba2 := uint8(startl shr 16);
cmdTable^.cfis.device := 1 shl 6;
cmdTable^.cfis.lba3 := uint8(startl shr 24);
cmdTable^.cfis.lba4 := uint8(starth);
cmdTable^.cfis.lba3 := uint8(starth shr 8);
cmdTable^.cfis.count_low := count and $FF;
cmdTable^.cfis.count_high:= (count shr 8) and $FF;
console.writestringln('7');
// while (pport^.tfd and $88) and spin < 1000000 do begin
// spin += 1;
// end;
while (hba^.ports[port].tfd and $88) and spin < 1000000 do begin
spin += 1;
end;
console.writestringln('8');
if spin = 1000000 then begin
@ -494,13 +521,13 @@ begin
end;
console.writestringln('9');
//pport^.ci := 1 shl slot;
pport^.ci := 1;
hba^.ports[port].ci := 1 shl slot;
//hba^.ports[port].ci := 1;
console.writestringln('10');
while true do begin
if(pport^.ci and (1 shl slot)) = (1 shl slot) then break;
if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin
if(hba^.ports[port].ci and (1 shl slot)) = (1 shl slot) then break;
if(hba^.ports[port].istat and (1 shl 30)) = (1 shl 30) then begin
console.writestringln('AHCI controller: Disk write error!');
write:= false;
exit;
@ -508,7 +535,7 @@ begin
end;
console.writestringln('11');
if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin
if(hba^.ports[port].istat and (1 shl 30)) = (1 shl 30) then begin
console.writestringln('AHCI controller: Disk write error!');
write:= false;
exit;
@ -535,5 +562,17 @@ begin
exit(-1);
end;
procedure test(value : uint32);
var
thing : PuInt32;
begin
thing:= Puint32(kalloc(1024*16));
thing^:= value;
write(0, $1, $0, 6, puint32(thing - KERNEL_VIRTUAL_BASE) );
thing^:= 365;
read(0, $1, $0, 6, puint32(thing - KERNEL_VIRTUAL_BASE) );
console.writeintln(thing^);
end;
end.

156
src/driver/storage/IDE.pas
View File

@ -0,0 +1,156 @@
{ ************************************************
* Asuro
* Unit: Drivers/storage/IDE
* Description: IDE ATA Driver
*
************************************************
* Author: Aaron Hance
* Contributors:
************************************************ }
unit ATA;
interface
uses
util,
drivertypes,
console,
terminal,
isr76,
drivermanagment,
vmemorymanager,
util;
type
TIDE_Channel_Registers = record
base : uint16;
ctrl : uint16;
bmide : uint16;
noInter : uint8
end;
TIDE_Device = record
exists : boolean;
isPrimary : boolean;
isMaster : boolean;
isATAPI : boolean;
signature : uint16;
capabilities : uint16;
commandSets : uint32;
size : uint32;
model : array[0..40] of uint8;
end;
const
ATA_SR_BUSY = $80; //BUSY
ATA_SR_DRDY = $40; //DRIVE READY
ATA_SR_DF = $20; //DRIVE WRITE FAULT
ATA_SR_DSC = $10; //DRIVE SEEK COMPLETE
ATA_SR_DRQ = $08; //DATA REQUEST READY
ATA_SR_CORR = $04; //CORRECTED DATA
ATA_SR_IDX = $02; //INLEX
ATA_SR_ERR = $01; //ERROR
ATA_ER_BBK = $80; //BAD SECTOR
ATA_ER_UNC = $40; //UNCORRECTABLE DATA
ATA_ER_MC = $20; //NO MEDIA
ATA_ER_IDNF = $10; //ID MARK NOT FOUND
ATA_ER_MCR = $08; //NO MEDIA
ATA_ER_ABRT = $04; //COMMAND ABORTED
ATA_ER_TK0NF = $02; //TRACK 0 NOT FOUND
ATA_ER_AMNF = $01; //NO ADDRESS MARK
ATA_CMD_READ_PIO = $20;
ATA_CMD_READ_PIO_EXT = $24;
ATA_CMD_READ_DMA = $C8;
ATA_CMD_READ_DMA_EXT = $25;
ATA_CMD_WRITE_PIO = $30;
ATA_CMD_WRITE_PIO_EXT = $34;
ATA_CMD_WRITE_DMA = $CA;
ATA_CMD_WRITE_DMA_EXT = $35;
ATA_CMD_CACHE_FLUSH = $E7;
ATA_CMD_CACHE_FLUSH_EXT = $EA;
ATA_CMD_PACKET = $A0;
ATA_CMD_IDENTIFY_PACKET = $A1;
ATA_CMD_IDENTIFY = $EC;
ATAPI_CMD_READ = $A8;
ATAPI_CMD_EJECT = $1B;
ATA_IDENT_DEVICETYPE = $0;
ATA_IDENT_CYLINDERS = $2;
ATA_IDENT_HEADS = $6;
ATA_IDENT_SECOTRS = $12;
ATA_IDENT_SERIAL = $20;
ATA_IDENT_MODEL = $54;
ATA_IDENT_CAPABILITIES = $98;
ATA_IDENT_FIELDVALID = $106;
ATA_IDENT_MAX_LBA = $120;
ATA_IDENT_COMMANDSETS = $164;
ATA_IDENT_MAX_LBA_EXT = $200;
ATA_REG_DATA = $00;
ATA_REG_ERROR = $01;
ATA_REG_FEATURES = $01;
ATA_REG_SECCOUNT0 = $02;
ATA_REG_LBA0 = $03;
ATA_REG_LBA1 = $04;
ATA_REG_LBA2 = $05;
ATA_REG_HDDEVSEL = $06;
ATA_REG_COMMAND = $07;
ATA_REG_STATUS = $07;
ATA_REG_SECCOUNT1 = $08;
ATA_REG_LBA3 = $09;
ATA_REG_LBA4 = $0A;
ATA_REG_LBA5 = $0B;
ATA_REG_CONTROL = $0C;
ATA_REG_ALTSTATUS = $0C;
ATA_REG_DEVADDRESS = $0D;
var
controller : TPCI_Device;
bar0 : uint32;
bar1 : uint32;
bar2 : uint32;
bar3 : uint32;
bar4 : uint32;
IDEDevices : array[0..3] of TIDE_Device;
procedure init;
function load(ptr : void) : boolean;
implementation
procedure init;
var
devID : PDeviceIdentifier;
begin
console.writestringln('IDE ATA Driver: Init()');
devID.bus:= biPCI;
devID.id0:= idANY;
devID.id1:= $00000001;
devID.id2:= $00000001;
devID.id3:= idANY;
devID.id4:= idANY;
devID.ex:= nil;
drivermanagment.register_driver('IDE ATA Driver', @devID, @load);
end;
function load(ptr : void) : boolean;
begin
controller := PPCI_Device(ptr);
bar0 := controller^.address0;
bar1 := controller^.address1;
bar2 := controller^.address2;
bar3 := controller^.address3;
bar4 := controller^.address4;
//setup channels
end;
end.

5
src/kernel.pas
View File

@ -34,7 +34,8 @@ uses
strings,
USB,
testdriver,
E1000;
E1000,
AHCI_OLD;
procedure kmain(mbinfo: Pmultiboot_info_t; mbmagic: uint32); stdcall;
@ -125,6 +126,8 @@ begin
mouse.init();
testdriver.init();
E1000.init();
//AHCI_OLD.init();
//Nothing beyond here
USB.init();
pci.init();
console.writestringln('DRIVERS: INIT END.');

14
src/pmemorymanager.pas
View File

@ -129,13 +129,13 @@ begin
end else begin
PhysicalMemory[block].Allocated:= True;
PhysicalMemory[block].MappedTo:= caller;
console.writestring('PMM: 4MiB Block Allocated @ ');
console.writeword(block);
console.writestring(' [');
console.writehex(block SHL 22);
console.writestring(' - ');
console.writehex(((block+1) SHL 22));
console.writestringln(']');
// console.writestring('PMM: 4MiB Block Allocated @ ');
// console.writeword(block);
// console.writestring(' [');
// console.writehex(block SHL 22);
// console.writestring(' - ');
// console.writehex(((block+1) SHL 22));
// console.writestringln(']');
alloc_block:= true;
end;
end else begin

28
src/vmemorymanager.pas
View File

@ -112,22 +112,22 @@ begin
PD^[page_number].PageSize:= true;
PD^[page_number].Writable:= true;
// console.writestringln('VMM: New Page Added:');
console.writestringln('VMM: New Page Added:');
// console.writestring('VMM: - P:');
// console.writehex(page_number);
// console.writestring('-->B:');
// console.writehexln(block);
console.writestring('VMM: - P:');
console.writehex(page_number);
console.writestring('-->B:');
console.writehexln(block);
// console.writestring('VMM: - P:[');
// console.writehex(page_number SHL 22);
// console.writestring(' - ');
// console.writehex(((page_number+1) SHL 22));
// console.writestring(']-->B:[');
// console.writehex(block SHL 22);
// console.writestring(' - ');
// console.writehex(((block+1) SHL 22));
// console.writestringln(']');
console.writestring('VMM: - P:[');
console.writehex(page_number SHL 22);
console.writestring(' - ');
console.writehex(((page_number+1) SHL 22));
console.writestring(']-->B:[');
console.writehex(block SHL 22);
console.writestring(' - ');
console.writehex(((block+1) SHL 22));
console.writestringln(']');
map_page_ex:= true;
end;