Spexeah/Asuro
Spexeah/Asuro
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git-svn-id: https://spexeah.com:8443/svn/Asuro@332 6dbc8c32-bb84-406f-8558-d1cf31a0ab0c

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This commit is contained in:
kieron 2018-04-05 14:55:50 +00:00
parent b215b992e8
commit 24a5f0334f
8 changed files with 47 additions and 6 deletions
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bin/kernel.bin
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iso/boot/asuro.bin
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lib/kernel.ppu
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lib/libpconsole.a
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lib/libpmultiboot.a
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lib/libpsystem.a
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41
src/driver/AHCI.pas
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@ -17,7 +17,8 @@ uses
drivertypes, drivertypes,
drivermanagement, drivermanagement,
lmemorymanager, lmemorymanager,
console; console,
vmemorymanager;
type type
@ -197,7 +198,7 @@ type
cfis : array[0..64] of uint8; cfis : array[0..64] of uint8;
acmd : array[0..16] of uint8; acmd : array[0..16] of uint8;
rsv : array[0..48] of uint8; rsv : array[0..48] of uint8;
prdt : array[0..1] of TPRD_Entry; prdt : array[0..7] of TPRD_Entry;
end; end;
var var
@ -240,14 +241,14 @@ begin
devID.id2:= $00000006; devID.id2:= $00000006;
devID.id3:= $00000001; devID.id3:= $00000001;
devID.ex:= nil; devID.ex:= nil;
drivermanagement.register_driver('AHCI Controller', @devID, @load) drivermanagement.register_driver('AHCI Controller', @devID, @load);
end; end;
function load(ptr : void) : boolean; function load(ptr : void) : boolean;
begin begin
ahciController := ptr; ahciController := ptr;
hba := THBAptr(PPCI_Device(ahciController)^.address5); hba := THBAptr(PPCI_Device(ahciController)^.address5);
new_page_at_address(uint32(hba));
check_ports(); check_ports();
load:= true; load:= true;
exit; exit;
@ -324,19 +325,26 @@ var
i : uint32; i : uint32;
spin : uint32 = 0; spin : uint32 = 0;
begin begin
console.writestringln('1');
pport := @hba^.ports[port]; pport := @hba^.ports[port];
new_page_at_address(uint32(pport));
pport^.istat := $ffff; pport^.istat := $ffff;
slot := find_cmd_slot(port); slot := find_cmd_slot(port);
if slot = -1 then exit(false); if slot = -1 then exit(false);
console.writestringln('2');
cmdHeader := @pport^.clb; cmdHeader := @pport^.clb;
new_page_at_address(uint32(cmdHeader));
cmdHeader += slot; cmdHeader += slot;
cmdHeader^.w := false; cmdHeader^.w := false;
cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1); cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1);
console.writestringln('3');
cmdTable := @cmdheader^.ctba; cmdTable := @cmdheader^.ctba;
new_page_at_address(uint32(cmdTable));
memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry)); memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
console.writestringln('4');
for i:= 0 to cmdHeader^.PRDTL -1 do begin for i:= 0 to cmdHeader^.PRDTL -1 do begin
cmdTable^.prdt[i].data_base_address := uint32(buf); cmdTable^.prdt[i].data_base_address := uint32(buf);
cmdTable^.prdt[i].data_byte_count := 8*1024-1; cmdTable^.prdt[i].data_byte_count := 8*1024-1;
@ -345,12 +353,15 @@ begin
count -= 16; count -= 16;
end; end;
console.writestringln('5');
cmdTable^.prdt[i].data_base_address := uint32(buf); cmdTable^.prdt[i].data_base_address := uint32(buf);
cmdTable^.prdt[i].data_byte_count := (count shl 9)-1; cmdTable^.prdt[i].data_byte_count := (count shl 9)-1;
cmdTable^.prdt[i].interrupt_oc := true; cmdTable^.prdt[i].interrupt_oc := true;
console.writestringln('6');
//setup command //setup command
cmdfis := @cmdTable^.cfis; cmdfis := @cmdTable^.cfis;
new_page_at_address(uint32(cmdfis));
cmdfis^.coc := true; cmdfis^.coc := true;
cmdfis^.command := $25; cmdfis^.command := $25;
cmdfis^.lba0 := uint8(startl); cmdfis^.lba0 := uint8(startl);
@ -363,18 +374,22 @@ begin
cmdfis^.count_low := count and $FF; cmdfis^.count_low := count and $FF;
cmdfis^.count_high:= (count shr 8) and $FF; cmdfis^.count_high:= (count shr 8) and $FF;
console.writestringln('7');
while (pport^.tfd and $88) and spin < 1000000 do begin while (pport^.tfd and $88) and spin < 1000000 do begin
spin += 1; spin += 1;
end; end;
console.writestringln('8');
if spin = 1000000 then begin if spin = 1000000 then begin
console.writestringln('AHCI controller: port is hung!'); console.writestringln('AHCI controller: port is hung!');
read:= false; read:= false;
exit; exit;
end; end;
console.writestringln('9');
pport^.ci := 1 shl slot; pport^.ci := 1 shl slot;
console.writestringln('10');
while true do begin while true do begin
if(pport^.ci and (1 shl slot)) = (1 shl slot) then break; if(pport^.ci and (1 shl slot)) = (1 shl slot) then break;
if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin
@ -384,12 +399,14 @@ begin
end; end;
end; end;
console.writestringln('11');
if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin
console.writestringln('AHCI controller: Disk read error!'); console.writestringln('AHCI controller: Disk read error!');
read:= false; read:= false;
exit; exit;
end; end;
console.writestringln('12');
read:= true; read:= true;
exit; exit;
end; end;
@ -404,19 +421,26 @@ var
i : uint32; i : uint32;
spin : uint32 = 0; spin : uint32 = 0;
begin begin
console.writestringln('1');
pport := @hba^.ports[port]; pport := @hba^.ports[port];
new_page_at_address(uint32(pport));
pport^.istat := $ffff; pport^.istat := $ffff;
slot := find_cmd_slot(port); slot := find_cmd_slot(port);
if slot = -1 then exit(false); if slot = -1 then exit(false);
console.writestringln('2');
cmdHeader := @pport^.clb; cmdHeader := @pport^.clb;
new_page_at_address(uint32(cmdHeader));
cmdHeader += slot; cmdHeader += slot;
cmdHeader^.w := false; cmdHeader^.w := false;
cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1); cmdHeader^.PRDTL := uint16(((count - 1) shr 4) + 1);
console.writestringln('3');
cmdTable := @cmdheader^.ctba; cmdTable := @cmdheader^.ctba;
new_page_at_address(uint32(cmdTable));
memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry)); memset(uint32(cmdTable), 0, sizeof(TCommand_Table) + (cmdheader^.PRDTL-1) * sizeof(TPRD_Entry));
console.writestringln('4');
for i:= 0 to cmdHeader^.PRDTL -1 do begin for i:= 0 to cmdHeader^.PRDTL -1 do begin
cmdTable^.prdt[i].data_base_address := uint32(buf); cmdTable^.prdt[i].data_base_address := uint32(buf);
cmdTable^.prdt[i].data_byte_count := 8*1024-1; cmdTable^.prdt[i].data_byte_count := 8*1024-1;
@ -425,11 +449,14 @@ begin
count -= 16; count -= 16;
end; end;
console.writestringln('5');
cmdTable^.prdt[i].data_base_address := uint32(buf); cmdTable^.prdt[i].data_base_address := uint32(buf);
cmdTable^.prdt[i].data_byte_count := (count shl 9)-1; cmdTable^.prdt[i].data_byte_count := (count shl 9)-1;
cmdTable^.prdt[i].interrupt_oc := true; cmdTable^.prdt[i].interrupt_oc := true;
console.writestringln('6');
cmdfis := @cmdTable^.cfis; cmdfis := @cmdTable^.cfis;
new_page_at_address(uint32(cmdfis));
cmdfis^.coc := true; cmdfis^.coc := true;
cmdfis^.command := $35; cmdfis^.command := $35;
cmdfis^.lba0 := uint8(startl); cmdfis^.lba0 := uint8(startl);
@ -442,18 +469,22 @@ begin
cmdfis^.count_low := count and $FF; cmdfis^.count_low := count and $FF;
cmdfis^.count_high:= (count shr 8) and $FF; cmdfis^.count_high:= (count shr 8) and $FF;
console.writestringln('7');
while (pport^.tfd and $88) and spin < 1000000 do begin while (pport^.tfd and $88) and spin < 1000000 do begin
spin += 1; spin += 1;
end; end;
console.writestringln('8');
if spin = 1000000 then begin if spin = 1000000 then begin
console.writestringln('AHCI controller: port is hung!'); console.writestringln('AHCI controller: port is hung!');
write:= false; write:= false;
exit; exit;
end; end;
console.writestringln('9');
pport^.ci := 1 shl slot; pport^.ci := 1 shl slot;
console.writestringln('10');
while true do begin while true do begin
if(pport^.ci and (1 shl slot)) = (1 shl slot) then break; if(pport^.ci and (1 shl slot)) = (1 shl slot) then break;
if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin
@ -463,12 +494,14 @@ begin
end; end;
end; end;
console.writestringln('11');
if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin if(pport^.istat and (1 shl 30)) = (1 shl 30) then begin
console.writestringln('AHCI controller: Disk write error!'); console.writestringln('AHCI controller: Disk write error!');
write:= false; write:= false;
exit; exit;
end; end;
console.writestringln('12');
write:= true; write:= true;
exit; exit;
end; end;

12
src/kernel.pas
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@ -129,11 +129,19 @@ begin
console.writestringln('DRIVERS: INIT END.'); console.writestringln('DRIVERS: INIT END.');
console.writestring('AHCI TEST'); console.writestring('AHCI TEST');
console.writestringln('A');
atmp:= puint16(kalloc(sizeof(uint16)));
console.writestringln('B');
atmp^ := 4242; atmp^ := 4242;
console.writestringln('C');
AHCI.write(0, $5, $1, 1, atmp); AHCI.write(0, $5, $1, 1, atmp);
console.writestringln('D');
atmp^ := 365; atmp^ := 365;
AHCI.read(9, $5, $1, 1, atmp); console.writestringln('E');
console.writeint(temp); AHCI.read(0, $5, $1, 1, atmp);
console.writestringln('F');
console.writeint(atmp^);
console.writestringln('G');
console.writestringln(''); console.writestringln('');
console.setdefaultattribute(console.combinecolors(Green, Black)); console.setdefaultattribute(console.combinecolors(Green, Black));