From 5779d57589ab24209c0d5ceb013ebce5fcc1d981 Mon Sep 17 00:00:00 2001
From: aaron <aaron@6dbc8c32-bb84-406f-8558-d1cf31a0ab0c>
Date: Sat, 20 May 2017 18:30:55 +0000
Subject: [PATCH] git-svn-id: https://spexeah.com:8443/svn/Asuro@146
6dbc8c32-bb84-406f-8558-d1cf31a0ab0c
---
src/drivers/PCI.pas | 160 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 160 insertions(+)
create mode 100644 src/drivers/PCI.pas
diff --git a/src/drivers/PCI.pas b/src/drivers/PCI.pas
new file mode 100644
index 00000000..eca23b2b
--- /dev/null
+++ b/src/drivers/PCI.pas
@@ -0,0 +1,160 @@
+{ ************************************************
+ * Asuro
+ * Unit: Drivers/PCI
+ * Description: PCI Driver
+ ************************************************
+ * Author: Aaron Hance
+ * Contributors:
+ ************************************************ }
+
+unit PCI
+
+interface
+
+uses
+ system,
+ util;
+
+type
+
+ TClass_Code = (
+ LEGACY, MASS_STORAGE_CONTROLLER, NETWORK_CONTROLLER,
+ DISPLAY_CONTROLLER, MULTIMEDIA_CONTROLLER, MEMORY_CONTROLLER,
+ BRIDGE_DEVICE, SIMPLE_COMM_CONTROLLER, BASE_SYS_PERIPHERALS,
+ INPUT_DEVICE, DOCKING_STATION, PROCESSOR, SERIAL_BUS_CONTROLLER,
+ WIRELESS_CONTROLLER, INTELLIGENT_IO_CONTROLLER,
+ SATELLITE_COMM_CONTROLLER, ENCRYPTION_CONTROLLER,
+ SIGNAL_PROCESSING_CONTROLLER, RESERVED
+ ); // 0XFF = OTHER DEVICE
+
+ TSub_Class_Codes record // first half sub device, second half prog id
+ any_non_vga_compatible : uint16 = $0000;
+ any_vga_compatible : uint16 = $0100;
+ scsi_bus_controller : uint16 = $0000;
+ ide_controller : uint16 = $01FF;
+ floppy_controller : uint16 = $0200;
+ ipi_bus_controller : uint16 = $0300;
+ raid_controller : uint16 = $0400;
+ ata_single_dma : uint16 = $0520;
+ ata_chained_dma : uint16 = $0530;
+ serial_ata_ahci_vsi : uint16 = $0600;
+ serial_ata_ahci : uint16 = $0601;
+ serial_attached_scsi : uint16 = $0700;
+ other_mass_storage : uint16 = $8000;
+ ethernet_controller : uint16 = $0000;
+ token_ring_controller : uint16 = $0100;
+ fddi_controller : uint16 = $0200;
+ atm_controller : uint16 = $0300;
+ isdn_controller : uint16 = $0400;
+ worldfip_controller : uint16 = $0500;
+ picmg_multi_computing : uint16 = $0600;
+ other_network_controller : uint16 = $8000;
+ vga_compatible_controller : uint16 = $0000;
+ c8512_compatible_controller : uint16 = $0001;
+ xga_controller : uint16 = $0100;
+ c3d_controller : uint16 = $0200;
+ other_display_controller : uint16 = $8000;
+ video_device : uint16 = $0000;
+ audio_device : uint16 = $0100;
+ computer_telephony_device : uint16 = $0200;
+ other_multimedia_device : uint16 = $8000;
+ ram_controller : uint16 = $0000;
+ flash_controller : uint16 = $0100;
+ other_memory_controller : uint16 = $8000;
+ host_bridge : uint16 = $0100;
+ isa_bridge : uint16 = $0200;
+ eisa_bridge : uint16 = $0300;
+ pci_2_pci_bridge : uint16 = $0400;
+ subtractive_pci_2_pci_bridge : uint16 = $0401;
+ pcmcia_bridge : uint16 = $0500;
+ nubus_bridge : uint16 = $0600;
+ cardbus_bridge : uint16 = $0700;
+ raceway_bridge : uint16 = $0800;
+ semi_pci_2_pci_bridge_p : uint16 = $0940;
+ semi_pci_2_pci_bridge_s : uint16 = $0980;
+ infiniband_2_pci_bridge : uint16 = $0A00;
+ other_bridge_device : uint16 = $8000;
+ end;
+
+ TPCI_Device_class record
+ class_code : uint8;
+ sub_classes : array[256] of uint8;
+ prog_if : array[256] of uint8;
+ end;
+
+ TPCI_Config bitpacked record
+ enable_bit : uint8; //first bit enables, rest reserved
+ bus_number : uint8;
+ df_number : uint8; // 5bits device number, 3bits function number
+ register_offset : uint8; //last 2bits should be 00
+ end;
+
+ TPCI_BIST bitpacked record
+ capable : boolean;
+ start : boolean;
+ reserved : ubit2;
+ completion_code : ubit3;
+ end;
+
+ TPCI_Header_Type bitpacked record
+ MF : boolean;
+ header_type : ubit7;
+ end;
+
+ TPCI_Device bitpacked record
+ device_id : uint16;
+ vendor_id : uint16;
+ status : uint16;
+ command : uint16;
+ class_code : uint8;
+ subclass_class : uint8;
+ prog_if : uint8;
+ revision_id : uint8;
+ BIST : TPCI_BIST;
+ header_type : uint8;
+ latency_timer : uint8;
+ cache_size : uint8;
+ address0 : uint32;
+ address1 : uint32;
+ address2 : uint32;
+ address3 : uint32;
+ address4 : uint32;
+ address5 : uint32;
+ CIS_pointer : uint32;
+ subsystem_id : uint16;
+ subsystem_vid : uint16;
+ exp_rom_addr : uint32;
+ reserved0 : uint16;
+ reserved1 : uint8;
+ capabilities : uint8;
+ reserved2 : uint32;
+ max_latency : uint8;
+ min_grant : uint8;
+ interrupt_pin : uint8;
+ interrupt_line : uint8;
+ end;
+
+ TPCI_Device_Bridge bitpacked record
+
+ end;
+
+ TCommand_Register bitpacked record
+ end;
+
+ TStatus_Register bitpacked record
+ end;
+
+var
+ classes: array [255] of TPCI_Device_class;
+
+procedure init();
+
+implementation
+
+ procedure init();
+ begin
+ end;
+
+
+end.
+