git-svn-id: https://spexeah.com:8443/svn/Asuro@241 6dbc8c32-bb84-406f-8558-d1cf31a0ab0c
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@ -8,69 +8,6 @@
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************************************************ }
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unit ATA;
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{$MACRO ON}
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{$define ATA_SR_BSY := 0x80 }
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{$define ATA_SR_DRDY := 0x40 }
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{$define ATA_SR_DF := 0x20 }
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{$define ATA_SR_DSC := 0x10 }
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{$define ATA_SR_DRQ := 0x08 }
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{$define ATA_SR_CORR := 0x04 }
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{$define ATA_SR_IDX := 0x02 }
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{$define ATA_SR_ERR := 0x01 }
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{$define ATA_CMD_READ_PIO := 0x20 }
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{$define ATA_CMD_READ_PIO_EXT := 0x24 }
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{$define ATA_CMD_READ_DMA := 0xC8 }
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{$define ATA_CMD_READ_DMA_EXT := 0x25 }
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{$define ATA_CMD_WRITE_PIO := 0x30 }
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{$define ATA_CMD_WRITE_PIO_EXT := 0x34 }
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{$define ATA_CMD_WRITE_DMA := 0xCA }
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{$define ATA_CMD_WRITE_DMA_EXT := 0x35 }
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{$define ATA_CMD_CACHE_FLUSH := 0xE7 }
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{$define ATA_CMD_CACHE_FLUSH_EXT := 0xEA }
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{$define ATA_CMD_PACKET := 0xA0 }
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{$define ATA_CMD_IDENTIFY_PACKET := 0xA1 }
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{$define ATA_CMD_IDENTIFY := 0xEC }
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{$define ATAPI_CMD_READ := 0xA8 }
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{$define ATAPI_CMD_EJECT := 0x1B }
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{$define ATA_IDENT_DEVICETYPE := 0 }
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{$define ATA_IDENT_CYLINDERS := 2 }
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{$define ATA_IDENT_HEADS := 6 }
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{$define ATA_IDENT_SECTORS := 12 }
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{$define ATA_IDENT_SERIAL := 20 }
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{$define ATA_IDENT_MODEL := 54 }
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{$define ATA_IDENT_CAPABILITIES := 98 }
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{$define ATA_IDENT_FIELDVALID := 106 }
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{$define ATA_IDENT_MAX_LBA := 120 }
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{$define ATA_IDENT_COMMANDSETS := 164 }
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{$define ATA_IDENT_MAX_LBA_EXT := 200 }
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{$define IDE_ATA := 0x00 }
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{$define IDE_ATAPI := 0x01 }
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{$define ATA_MASTER := 0x00 }
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{$define ATA_SLAVE := 0x01 }
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{$define ATA_REG_DATA := 0x00 }
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{$define ATA_REG_ERROR := 0x01 }
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{$define ATA_REG_FEATURES := 0x01 }
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{$define ATA_REG_SECCOUNT0 := 0x02 }
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{$define ATA_REG_LBA0 := 0x03 }
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{$define ATA_REG_LBA1 := 0x04 }
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{$define ATA_REG_LBA2 := 0x05 }
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{$define ATA_REG_HDDEVSEL := 0x06 }
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{$define ATA_REG_COMMAND := 0x07 }
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{$define ATA_REG_STATUS := 0x07 }
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{$define ATA_REG_SECCOUNT1 := 0x08 }
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{$define ATA_REG_LBA3 := 0x09 }
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{$define ATA_REG_LBA4 := 0x0A }
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{$define ATA_REG_LBA5 := 0x0B }
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{$define ATA_REG_CONTROL := 0x0C }
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{$define ATA_REG_ALTSTATUS := 0x0C }
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{$define ATA_REG_DEVADDRESS := 0x0D }
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interface
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uses
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@ -80,57 +17,114 @@ uses
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terminal;
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type
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intptr = ^uint32;
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IDE_Channel_Registers = record
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base : uint16;
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ctrl : uint16;
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bmide : uint16;
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nIEN : uint8;
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end;
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ATA_Device = record
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IDE_Device = record
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Reserved : uint8;
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Channel : uint8;
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Drive : uint8;
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dType : uint16;
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Signature : uint16;
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Capabilities : uint16;
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CommandSets : uint32;
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Size : uint32;
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Model : array[0..41] of uint8;
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end;
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var
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ATA1 : uint32;
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ATA2 : uint32;
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ATA3 : uint32;
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ATA4 : uint32;
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BUS_MASTER : uint32;
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//0 = primary, 1 = secondary
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dataPort : array[0..1] of uint16;
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errorPort : array[0..1] of uint8;
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sectorCountPort : array[0..1] of uint8;
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lbaLowPort : array[0..1] of uint8;
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lbaMidPort : array[0..1] of uint8;
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lbaHiPort : array[0..1] of uint8;
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devicePort : array[0..1] of uint8;
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commandPort : array[0..1] of uint8;
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controlPort : array[0..1] of uint8;
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channels : array[0..1] of IDE_Channel_Registers;
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devices : array[0..3] of IDE_Device;
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bytes_per_sector : uint16 = 512;
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ide_buff : array[0..2048] of uint8;
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ide_irq_invoked : uint8 = 0;
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atapi_packet : array[0..11] of uint8 = ($AB, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
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controller : TPCI_device;
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procedure init(device : TPCI_Device);
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procedure init(device : TPCI_device);
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procedure identify(drive : uint8; bus : uint8);
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procedure read28(sector : uint32);
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procedure write28(sector : uint32; data : intptr; count : uint32);
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procedure flush();
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implementation
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procedure init(device : TPCI_Device);
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begin
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ATA1 := device.address0;
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ATA2 := device.address1;
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ATA3 := device.address2;
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ATA4 := device.address3;
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BUS_MASTER := device.address4;
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procedure init(device : TPCI_device);
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begin
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console.writehexln(ATA1);
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console.writehexln(ATA2);
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console.writehexln(BUS_MASTER);
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controller := device;
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controller.address0 := $1f0;
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// 0x1f0, 0x170
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console.writehexln(controller.address0);
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dataPort[0] := controller.address0;
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errorPort[0] := controller.address0 + 1;
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sectorCountPort[0] := controller.address0 + 2;
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lbaLowPort[0] := controller.address0 + 3;
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lbaMidPort[0] := controller.address0 + 4;
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lbaHiPort[0] := controller.address0 + 5;
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devicePort[0] := controller.address0 + 6;
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commandPort[0] := controller.address0 + 7;
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controlPort[0] := controller.address0 + $206;
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identify($A0, $A0);
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identify($B0, $A0);
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end;
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procedure identify(drive : uint8; bus : uint8);
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var
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status : uint8;
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busNo : uint8;
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i : uint16;
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data : array[0..265] of uint16;
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begin
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busNo := 0;
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if bus = $A0 then busNo := 0;
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outb(devicePort[busNo], drive);
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outb(controlPort[busNo], 0);
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outb(devicePort[busNo], bus);
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status := inb(commandPort[busNo]);
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if status <> $FF then begin
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outb(devicePort[busNo], drive);
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outb(sectorCountPort[busNo], 0);
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outb(lbaLowPort[busNo], 0);
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outb(lbaMidPort[busNo], 0);
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outb(lbaHiPort[busNo], 0);
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outb(commandPort[busNo], $EC);
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status := inb(commandPort[busNo]);
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if status = 0 then exit;
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while((status and $08 = 08) and (status and $01 <> 1)) do begin
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status := inb(commandPort[busNo])
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end;
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status := inb(commandPort[busNo]);
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if status and $01 = 1 then begin
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console.writestringln('ATA DEVICE ERROR');
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end else begin
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for i:=0 to 265 do begin
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data[i] := inw(dataPort[busNo]);
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console.writestringln(pchar(@data[i]));
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//console.writeint(data[i]);
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psleep(10);
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end;
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end;
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end else begin
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console.writestringln('no device');
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end;
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end;
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procedure read28(sector : uint32); begin
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end;
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procedure write28(sector : uint32; data : intptr; count : uint32); begin
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end;
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procedure flush(); begin
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end;
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end.
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@ -12,7 +12,7 @@ interface
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type
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TPCI_Device = packed record
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TPCI_Device = bitpacked record
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device_id : uint16;
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vendor_id : uint16;
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status : uint16;
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