Cleanup
This commit is contained in:
@@ -50,6 +50,7 @@ function send_read_dma(device : PAHCI_Device; lba : uint64; count : uint32; buff
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function send_write_dma(device : PAHCI_Device; lba : uint64; count : uint32; buffer : puint32) : boolean;
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function send_write_dma(device : PAHCI_Device; lba : uint64; count : uint32; buffer : puint32) : boolean;
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function read_atapi(device : PAHCI_Device; lba : uint64; count : uint32; buffer : puint32) : boolean;
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function read_atapi(device : PAHCI_Device; lba : uint64; count : uint32; buffer : puint32) : boolean;
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implementation
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implementation
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procedure init();
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procedure init();
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@@ -113,8 +114,44 @@ begin
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// Clear the SERR register by writing 1s to it.
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// Clear the SERR register by writing 1s to it.
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port^.sata_error := $FFFFFFFF;
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port^.sata_error := $FFFFFFFF;
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start_port(port);
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end;
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end;
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// procedure reset_port(port : PHBA_Port);
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// var
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// ssts, serr, timeout : uint32;
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// begin
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// console.writestringln('AHCI: Performing a full port reset.');
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// port^.cmd := port^.cmd and not $1;
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// // Wait until CR (bit 15) is cleared.
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// timeout := 0;
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// while (port^.cmd and $8000) <> 0 do begin
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// timeout := timeout + 1;
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// if timeout > 1000000 then begin
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// console.writestringln('AHCI: Port reset timeout.');
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// break;
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// end;
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// end;
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// port^.sata_ctrl := port^.sata_ctrl and $FFFF0000;
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// port^.sata_ctrl := port^.sata_ctrl or $1;
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// psleep(10);
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// port^.sata_ctrl := port^.sata_ctrl and $FFFF0000;
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// while (port^.sata_status and $F) <> $3 do begin
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// //wait for the port to be ready
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// end;
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// // Clear the SERR register by writing 1s to it.
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// port^.sata_error := $FFFFFFFF;
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// // start_port(port);
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// end;
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{
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{
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Check the ports on the controller and setup the command list, FIS, and command table
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Check the ports on the controller and setup the command list, FIS, and command table
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}
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}
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@@ -229,7 +266,6 @@ begin
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//reset the port
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//reset the port
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reset_port(port);
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reset_port(port);
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start_port(port);
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//print sata status
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//print sata status
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console.writestring('AHCI: sata status: ');
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console.writestring('AHCI: sata status: ');
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@@ -383,19 +419,23 @@ begin
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console.writestringln('');
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console.writestringln('');
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buffer := puint32(kalloc(512));
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buffer := puint32(kalloc(2048));
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memset(uint32(buffer), 0, 512);
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memset(uint32(buffer), 0, 2048);
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//send a read DMA command to the device
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//send a read DMA command to the device
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if isATAPI then begin
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if isATAPI then begin
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read_atapi(device, 16, 512, buffer);
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read_atapi(device, 0, 2048, buffer);
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end else begin
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end else begin
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send_read_dma(device, 10, 512, buffer);
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memset(uint32(buffer), $77, 2048);
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send_write_dma(device, 22, 512, buffer);
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memset(uint32(buffer), 0, 2048);
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send_read_dma(device, 22, 512, buffer);
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end;
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end;
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//print the buffer
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//print the buffer
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for i:=0 to 63 do begin
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for i:=0 to 63 do begin
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console.writehex(uint32(buffer[i]));
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console.writehex(puInt8(buffer)[i]);
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console.writestring(' ');
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console.writestring(' ');
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end;
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end;
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console.writestringln('');
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console.writestringln('');
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@@ -536,7 +576,6 @@ begin
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console.writestringln('AHCI: Sending read DMA command');
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console.writestringln('AHCI: Sending read DMA command');
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reset_port(device^.port);
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reset_port(device^.port);
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start_port(device^.port);
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//prdt count is 22 bits
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//prdt count is 22 bits
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prdt_count := (count div 4194304) + 1;
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prdt_count := (count div 4194304) + 1;
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@@ -647,7 +686,6 @@ begin
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console.writestringln('AHCI: Sending write DMA command');
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console.writestringln('AHCI: Sending write DMA command');
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reset_port(device^.port);
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reset_port(device^.port);
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start_port(device^.port);
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//prdt count is 22 bits
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//prdt count is 22 bits
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prdt_count := (count div 4194304) + 1;
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prdt_count := (count div 4194304) + 1;
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@@ -688,6 +726,8 @@ begin
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fis^.command := ATA_CMD_WRITE_DMA_EXT;
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fis^.command := ATA_CMD_WRITE_DMA_EXT;
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fis^.device := $40; // LBA mode 48?
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fis^.device := $40; // LBA mode 48?
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count:= count div 512;
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fis^.lba0 := lba and $FF;
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fis^.lba0 := lba and $FF;
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fis^.lba1 := (
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fis^.lba1 := (
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lba shr 8) and $FF;
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lba shr 8) and $FF;
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@@ -764,7 +804,6 @@ begin
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console.writestringln('AHCI: Sending read ATAPI command');
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console.writestringln('AHCI: Sending read ATAPI command');
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reset_port(device^.port);
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reset_port(device^.port);
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start_port(device^.port);
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//prdt count is 22 bits
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//prdt count is 22 bits
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prdt_count := (count div 4194304) + 1;
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prdt_count := (count div 4194304) + 1;
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@@ -781,12 +820,13 @@ begin
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cmd_header^.wrt := 0;
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cmd_header^.wrt := 0;
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cmd_header^.prdtl := 1;
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cmd_header^.prdtl := 1;
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cmd_header^.atapi := 1;
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cmd_header^.atapi := 1;
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cmd_header^.clear_busy := 1;
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// Setup the command table (using slot 0)
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// Setup the command table (using slot 0)
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cmd_table := PHBA_CMD_TABLE(uint32(device^.command_table) + (slot * sizeof(THBA_CMD_TABLE)));
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cmd_table := PHBA_CMD_TABLE(uint32(device^.command_table) + (slot * sizeof(THBA_CMD_TABLE)));
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cmd_table^.prdt[0].dba := vtop(uint32(buffer));
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cmd_table^.prdt[0].dba := vtop(uint32(buffer));
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cmd_table^.prdt[0].dbc := 512 - 1; // 512 bytes (0-based count
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cmd_table^.prdt[0].dbc := 2048 - 1; // 512 bytes (0-based count
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cmd_table^.prdt[0].int := 1; // Interrupt on completion
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cmd_table^.prdt[0].int := 1; // Interrupt on completion
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// Construct the Command FIS in the command table's CFIS area
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// Construct the Command FIS in the command table's CFIS area
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@@ -795,7 +835,7 @@ begin
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fis^.fis_type := uint8(FIS_TYPE_REG_H2D);
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fis^.fis_type := uint8(FIS_TYPE_REG_H2D);
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fis^.c := $1;
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fis^.c := $1;
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fis^.command := ATA_CMD_PACKET;
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fis^.command := ATA_CMD_PACKET;
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fis^.device := $A0; // LBA mode 48?
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fis^.device := $A0;
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fis^.featurel := fis^.featurel or 1; //setting both of these might not work on real hardware
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fis^.featurel := fis^.featurel or 1; //setting both of these might not work on real hardware
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fis^.featurel := fis^.featurel or (1 shl 2);
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fis^.featurel := fis^.featurel or (1 shl 2);
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File diff suppressed because it is too large
Load Diff
@@ -1,85 +0,0 @@
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// Copyright 2021 Aaron Hance
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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{
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Drivers->Storage->ATA_ISR - Primary ATA IRQ.
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@author(Aaron Hance <[email protected]>)
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}
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unit ATA_ISR;
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interface
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uses
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util,
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console,
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isr_types,
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isrmanager,
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IDT;
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procedure register();
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procedure hook(hook_method : uint32);
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procedure unhook(hook_method : uint32);
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implementation
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var
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Hooks : Array[1..MAX_HOOKS] of pp_hook_method;
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procedure Main(); interrupt;
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var
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i : integer;
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begin
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CLI;
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for i:=0 to MAX_HOOKS-1 do begin
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if uint32(Hooks[i]) <> 0 then Hooks[i](void($00000000));
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end;
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console.writestringln('Disk Operation Complete');
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end;
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procedure register();
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begin
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memset(uint32(@Hooks[0]), 0, sizeof(pp_hook_method)*MAX_HOOKS);
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//isrmanager.registerISR(76, @Main);
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//IDT.set_gate(76, uint32(@Main), $08, ISR_RING_0);
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end;
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procedure hook(hook_method : uint32);
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var
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i : uint32;
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begin
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for i:=0 to MAX_HOOKS-1 do begin
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if uint32(Hooks[i]) = hook_method then exit;
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end;
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for i:=0 to MAX_HOOKS-1 do begin
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if uint32(Hooks[i]) = 0 then begin
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Hooks[i]:= pp_hook_method(hook_method);
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exit;
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end;
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end;
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end;
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procedure unhook(hook_method : uint32);
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var
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i : uint32;
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begin
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for i:=0 to MAX_HOOKS-1 do begin
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If uint32(Hooks[i]) = hook_method then Hooks[i]:= nil;
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exit;
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end;
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end;
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end.
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@@ -15,6 +15,8 @@
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{
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{
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Drivers->Storage->ide - IDE Driver.
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Drivers->Storage->ide - IDE Driver.
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NOT FINSIHED NEEDS WORK
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@author(Aaron Hance <[email protected]>)
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@author(Aaron Hance <[email protected]>)
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}
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}
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unit ide;
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unit ide;
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@@ -1,3 +1,27 @@
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// Copyright 2021 Aaron Hance
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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{
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Drivers->Storage->ATAPI - ATAPI Driver.
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!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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!!!!!!!!!!!!!!!!!!!!!! CURRENTLY NOT FUNCTIONAL !!!!!!!!!!!!!!!!!!!!!!
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!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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@author(Aaron Hance <[email protected]>)
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}
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unit atapi;
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unit atapi;
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interface
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interface
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File diff suppressed because it is too large
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