git-svn-id: https://spexeah.com:8443/svn/Asuro@166 6dbc8c32-bb84-406f-8558-d1cf31a0ab0c
This commit is contained in:
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@ -7,13 +7,13 @@
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* Contributors:
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************************************************ }
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unit PCI
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unit PCI;
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interface
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uses
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system,
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util;
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util,
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console;
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type
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@ -27,56 +27,56 @@ type
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SIGNAL_PROCESSING_CONTROLLER, RESERVED
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); // 0XFF = OTHER DEVICE
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TSub_Class_Codes record // first half sub device, second half prog id
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any_non_vga_compatible : uint16 = $0000;
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any_vga_compatible : uint16 = $0100;
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scsi_bus_controller : uint16 = $0000;
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ide_controller : uint16 = $01FF;
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floppy_controller : uint16 = $0200;
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ipi_bus_controller : uint16 = $0300;
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raid_controller : uint16 = $0400;
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ata_single_dma : uint16 = $0520;
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ata_chained_dma : uint16 = $0530;
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serial_ata_ahci_vsi : uint16 = $0600;
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serial_ata_ahci : uint16 = $0601;
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serial_attached_scsi : uint16 = $0700;
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other_mass_storage : uint16 = $8000;
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ethernet_controller : uint16 = $0000;
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token_ring_controller : uint16 = $0100;
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fddi_controller : uint16 = $0200;
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atm_controller : uint16 = $0300;
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isdn_controller : uint16 = $0400;
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worldfip_controller : uint16 = $0500;
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picmg_multi_computing : uint16 = $0600;
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other_network_controller : uint16 = $8000;
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vga_compatible_controller : uint16 = $0000;
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c8512_compatible_controller : uint16 = $0001;
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xga_controller : uint16 = $0100;
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c3d_controller : uint16 = $0200;
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other_display_controller : uint16 = $8000;
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video_device : uint16 = $0000;
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audio_device : uint16 = $0100;
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computer_telephony_device : uint16 = $0200;
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other_multimedia_device : uint16 = $8000;
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ram_controller : uint16 = $0000;
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flash_controller : uint16 = $0100;
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other_memory_controller : uint16 = $8000;
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host_bridge : uint16 = $0100;
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isa_bridge : uint16 = $0200;
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eisa_bridge : uint16 = $0300;
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pci_2_pci_bridge : uint16 = $0400;
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subtractive_pci_2_pci_bridge : uint16 = $0401;
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pcmcia_bridge : uint16 = $0500;
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nubus_bridge : uint16 = $0600;
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cardbus_bridge : uint16 = $0700;
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raceway_bridge : uint16 = $0800;
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semi_pci_2_pci_bridge_p : uint16 = $0940;
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semi_pci_2_pci_bridge_s : uint16 = $0980;
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infiniband_2_pci_bridge : uint16 = $0A00;
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other_bridge_device : uint16 = $8000;
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end;
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// TSub_Class_Codes = record // first half sub device, second half prog id
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// any_non_vga_compatible : uint16 = $0000;
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// any_vga_compatible : uint16 = $0100;
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// scsi_bus_controller : uint16 = $0000;
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// ide_controller : uint16 = $01FF;
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// floppy_controller : uint16 = $0200;
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// ipi_bus_controller : uint16 = $0300;
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// raid_controller : uint16 = $0400;
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// ata_single_dma : uint16 = $0520;
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// ata_chained_dma : uint16 = $0530;
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// serial_ata_ahci_vsi : uint16 = $0600;
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// serial_ata_ahci : uint16 = $0601;
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// serial_attached_scsi : uint16 = $0700;
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// other_mass_storage : uint16 = $8000;
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// ethernet_controller : uint16 = $0000;
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// token_ring_controller : uint16 = $0100;
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// fddi_controller : uint16 = $0200;
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// atm_controller : uint16 = $0300;
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// isdn_controller : uint16 = $0400;
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// worldfip_controller : uint16 = $0500;
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// picmg_multi_computing : uint16 = $0600;
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// other_network_controller : uint16 = $8000;
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// vga_compatible_controller : uint16 = $0000;
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// c8512_compatible_controller : uint16 = $0001;
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// xga_controller : uint16 = $0100;
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// c3d_controller : uint16 = $0200;
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// other_display_controller : uint16 = $8000;
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// video_device : uint16 = $0000;
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// audio_device : uint16 = $0100;
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// computer_telephony_device : uint16 = $0200;
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// other_multimedia_device : uint16 = $8000;
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// ram_controller : uint16 = $0000;
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// flash_controller : uint16 = $0100;
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// other_memory_controller : uint16 = $8000;
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// host_bridge : uint16 = $0100;
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// isa_bridge : uint16 = $0200;
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// eisa_bridge : uint16 = $0300;
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// pci_2_pci_bridge : uint16 = $0400;
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// subtractive_pci_2_pci_bridge : uint16 = $0401;
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// pcmcia_bridge : uint16 = $0500;
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// nubus_bridge : uint16 = $0600;
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// cardbus_bridge : uint16 = $0700;
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// raceway_bridge : uint16 = $0800;
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// semi_pci_2_pci_bridge_p : uint16 = $0940;
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// semi_pci_2_pci_bridge_s : uint16 = $0980;
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// infiniband_2_pci_bridge : uint16 = $0A00;
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// other_bridge_device : uint16 = $8000;
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// end;
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TPCI_Config bitpacked record
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TPCI_Config = bitpacked record
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enable_bit : boolean;
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reserved : ubit7;
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bus_number : uint8;
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@ -86,32 +86,33 @@ type
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always_0 : ubit2;
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end;
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TPCI_BIST bitpacked record
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TPCI_BIST = bitpacked record
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capable : boolean;
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start : boolean;
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reserved : ubit2;
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completion_code : ubit3;
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end;
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TPCI_Header_Type bitpacked record
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TPCI_Header_Type = bitpacked record
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always_0 : boolean;
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MF : boolean;
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header_type : ubit7;
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end;
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TPCI_Memory_BAR bitpacked record
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TPCI_Memory_BAR = bitpacked record
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address : ubit28; //16-Byte aligned
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prefetchable : boolean;
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bar_type : ubit2;
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always_0 : boolean = 0;
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always_0 : boolean;
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end;
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TPCI_IO_BAR bitpacked record
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TPCI_IO_BAR = bitpacked record
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address : ubit30; //4-byte aligned
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reserved : boolean;
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always_0 : boolean = 0;
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always_0 : boolean;
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end;
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TPCI_Device bitpacked record
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TPCI_Device = bitpacked record
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device_id : uint16;
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vendor_id : uint16;
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status : uint16;
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@ -120,16 +121,16 @@ type
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subclass_class : uint8;
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prog_if : uint8;
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revision_id : uint8;
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BIST : TPCI_BIST;
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header_type : TPCI_Header_Type;
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BIST : uint8;
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header_type : uint8;
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latency_timer : uint8;
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cache_size : uint8;
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address0 : TPCI_Memory_BAR;
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address1 : TPCI_Memory_BAR;
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address2 : TPCI_Memory_BAR;
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address3 : TPCI_Memory_BAR;
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address4 : TPCI_Memory_BAR;
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address5 : TPCI_Memory_BAR;
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address0 : uint32;
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address1 : uint32;
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address2 : uint32;
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address3 : uint32;
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address4 : uint32;
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address5 : uint32;
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CIS_pointer : uint32;
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subsystem_id : uint16;
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subsystem_vid : uint16;
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@ -144,11 +145,11 @@ type
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interrupt_line : uint8;
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end;
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TPCI_Device_Bridge bitpacked record
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TPCI_Device_Bridge = bitpacked record
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placeholder : uint8;
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end;
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TCommand_Register bitpacked record
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TCommand_Register = bitpacked record
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reserved : ubit5;
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interupt_disable : boolean;
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fast_b2b_enable : boolean;
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@ -163,7 +164,7 @@ type
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io_space : boolean;
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end;
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TStatus_Register bitpacked record
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TStatus_Register = bitpacked record
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detected_parity_error,
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signaled_sys_error,
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received_master_abort,
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@ -175,77 +176,209 @@ type
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reserved,
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c66Mhz_compatible,
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capabilities_list,
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interrupt_status : boolean
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interrupt_status : boolean;
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reserved0 : ubit2;
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end;
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var
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devices : array[0..(256 * 32)] of TPCI_Device;
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devices : array[0..8191] of TPCI_Device;
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busses : array[0..256] of TPCI_Device_Bridge;
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device_count, bus_count : uint16 = 0;
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device_count : uint16 = 0;
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bus_count : uint16 = 0;
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procedure init();
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procedure loadConfig(bus : uint8; slot : uint8; func : uint8; offset : uint8);
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function check_device(bus : uint8; device : uint8) :
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function get_vendor_ID() : uint16;
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function get_function() : boolean;
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function read_device_config();
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function read_bridge_config();
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function check_device(bus : uint8; device : uint8) : boolean;
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function get_vendor_ID(bus : uint8; slot : uint8; func : uint8; offset : uint8) : uint16;
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function isDevice(bus : uint8; slot : uint8; func : uint8; offset : uint8) : ubit2;
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function read8(bus : uint8; slot : uint8; func : uint8; offset : uint8; part : uint8) : uint8;
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function read16(bus : uint8; slot : uint8; func : uint8; offset : uint8; part : ubit2) : uint16;
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function read32(bus : uint8; slot : uint8; func : uint8; offset : uint8) : uint32;
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function read_device_config(bus : uint8; slot : uint8; func : uint8; offset : uint8) : TPCI_Device;
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//function read_bridge_config() : TPCI_Device_Bridge;
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implementation
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function init();
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procedure init();
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var
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i : uint16;
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begin
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//enumerate all pci devices
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//enumerate master pci bus devices
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for i:=0 to 31 do begin
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check_and_get(0, i);
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check_device(0, i);
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end;
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for i:= 0 to device_count -1 do begin
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console.writestring('PCI Device: ');
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console.writehexln(devices[i].vendor_id);
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psleep(350);
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end;
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//TODO while there are unchecked nested busses, check nested busses
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end;
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procedure loadConfig(bus : uint8; slot : uint8; func : uint8; offset : uint8);
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var
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packet : TPCI_Config;
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packetI : uint32;
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begin
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packet.bus_number := bus;
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packet.device_number := slot;
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packet.function_number := func;
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packet.register_offset := offset;
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util.outl(0xCF8, packet);
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// packet.enable_bit := true;
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// packet.bus_number := bus;
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// packet.device_number := slot;
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// packet.function_number := func;
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// packet.register_offset := offset;
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// packet.always_0 := $0;
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packetI := ($1 shl 31);
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packetI := packetI or (bus shl 17);
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packetI := packetI or (slot shl 11);
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packetI := packetI or (func shl 8);
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packetI := packetI or (offset shl 2);
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outl($CF8, uint32(packetI));
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end;
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function check_device(bus : uint8; device : uint8) : boolean;
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function check_device(bus : uint8; device : uint8) : boolean;
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var
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i : uint8;
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vendor_id : uint16;
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isDevice : boolean;
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isDeviceb : uint8;
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begin
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loadConfig(bus, slot, 0, 0);
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vendor_id := get_vendor_ID(bus, device, 0, 0);
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if vendor_id = $FFFF then exit;
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vendor_id := get_vendor_ID();
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if vendor_id = $0xFFFF then exit;
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isDevice := get_function();
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if isDevice then begin
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devices[device_count] := TPCI_Device(read_device_config);
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isDeviceb := isDevice(bus, device, 0, 8);
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if isDeviceb = 1 then begin
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devices[device_count] := read_device_config(bus, device, 0, 0);
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device_count := device_count + 1;
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end;
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else begin
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busses[bus_count] := TPCI_Device_Bridge(read_bridge_config);
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check_device := true;
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end else begin
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console.writestringln('NESTED BUS FOUND');
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//busses[bus_count] := read_bridge_config();
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bus_count := bus_count + 1;
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check_device := false;
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end;
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end;
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function get_vendor_ID(bus : uint8; device : uint8) : uint16;
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function get_vendor_ID(bus : uint8; slot : uint8; func : uint8; offset : uint8) : uint16;
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begin
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get_vendor_ID := read16(bus, slot, func, offset, 0);
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end;
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function isDevice(bus : uint8; slot : uint8; func : uint8; offset : uint8) : ubit2;
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begin
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if(read8(bus, slot, func, offset, 2) = $06) then begin
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isDevice := 0;
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exit;
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end;
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isDevice := 1;
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end;
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function read8(bus : uint8; slot : uint8; func : uint8; offset : uint8; part : uint8) : uint8;
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begin
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loadConfig(bus, slot, func, offset);
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read8 := (inb($CFC) shl (part * 8)) and $FF;
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end;
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function read16(bus : uint8; slot : uint8; func : uint8; offset : uint8; part : ubit2) : uint16;
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begin
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loadConfig(bus, slot, func, offset);
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read16 := (inw($CFC) shl (part * 16)) and $FFFF;
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end;
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function read32(bus : uint8; slot : uint8; func : uint8; offset : uint8) : uint32;
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begin
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loadConfig(bus, slot, func, offset);
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read32 := inl($CFC);
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end;
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function read_device_config(bus : uint8; slot : uint8; func : uint8; offset : uint8) : TPCI_Device;
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var
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tmp : TPCI_Device;
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begin
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memset(uint32(@tmp), 0, sizeof(TPCI_Device));
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tmp.device_id := read16(bus, slot, func, offset, 1);
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tmp.vendor_id := read16(bus, slot, func, offset, 0);
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offset := offset + $04;
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tmp.status := read16(bus, slot, func, offset, 1);
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tmp.command := read16(bus, slot, func, offset, 0);
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offset := offset + $04;
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tmp.class_code := read8(bus, slot, func, offset, 3);
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tmp.subclass_class := read8(bus, slot, func, offset, 2);
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tmp.prog_if := read8(bus, slot, func, offset, 1);
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tmp.revision_id := read8(bus, slot, func, offset, 0);
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offset := offset + $04;
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tmp.BIST := read8(bus, slot, func, offset, 3);
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tmp.header_type := read8(bus, slot, func, offset, 2);
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tmp.latency_timer := read8(bus, slot, func, offset, 1);
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tmp.cache_size := read8(bus, slot, func, offset, 0);
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offset := offset + $04;
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tmp.address0 := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.address1 := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.address2 := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.address3 := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.address4 := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.address5 := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.CIS_pointer := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.subsystem_id := read16(bus, slot, func, offset, 1);
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tmp.subsystem_vid := read16(bus, slot, func, offset, 0);
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offset := offset + $04;
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tmp.exp_rom_addr := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.reserved0 := read16(bus, slot, func, offset, 1);
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tmp.reserved1 := read8(bus, slot, func, offset, 1);
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tmp.capabilities := read8(bus, slot, func, offset, 0);
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offset := offset + $04;
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tmp.reserved2 := read32(bus, slot, func, offset);
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offset := offset + $04;
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tmp.max_latency := read8(bus, slot, func, offset, 3);
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tmp.min_grant := read8(bus, slot, func, offset, 2);
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tmp.interrupt_pin := read8(bus, slot, func, offset, 1);
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tmp.interrupt_line := read8(bus, slot, func, offset, 0);
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console.writestring('Checking Device: ');
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console.writehex(slot);
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console.writestring(' ');
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console.writehex(tmp.device_id);
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console.writestring(' ');
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console.writehex(tmp.vendor_id);
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console.writestring(' ');
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console.writehex(tmp.class_code);
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console.writestring(' ');
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console.writehexln(tmp.subclass_class);
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psleep(1000);
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read_device_config := tmp;
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end;
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|
||||
// function read_bridge_config() : TPCI_Device_Bridge;
|
||||
// begin
|
||||
// read_bridge_config.placeholder = $FF;
|
||||
// end;
|
||||
|
||||
end.
|
||||
|
||||
|
@ -25,7 +25,8 @@ uses
|
||||
vmemorymanager,
|
||||
pmemorymanager,
|
||||
lmemorymanager,
|
||||
scheduler;
|
||||
scheduler,
|
||||
PCI;
|
||||
|
||||
procedure kmain(mbinfo: Pmultiboot_info_t; mbmagic: uint32); stdcall;
|
||||
|
||||
@ -39,6 +40,7 @@ var
|
||||
pint : puint32;
|
||||
pint2 : puint32;
|
||||
keyboard_layout : array [0..1] of TKeyInfo;
|
||||
i : uint32;
|
||||
|
||||
begin
|
||||
multibootinfo:= mbinfo;
|
||||
@ -68,9 +70,14 @@ begin
|
||||
STI;
|
||||
isr32.hook(uint32(@bios_data_area.tick_update));
|
||||
|
||||
console.writestringln('Initializing Drivers');
|
||||
//drivers
|
||||
pci.init();
|
||||
keyboard.init(keyboard_layout);
|
||||
|
||||
console.writestringln('Drivers Initialized');
|
||||
|
||||
|
||||
asm
|
||||
MOV dds, CS
|
||||
end;
|
||||
@ -110,6 +117,11 @@ begin
|
||||
z:=z+1;
|
||||
end;}
|
||||
|
||||
console.writestringln('');
|
||||
|
||||
|
||||
|
||||
|
||||
util.halt_and_dont_catch_fire;
|
||||
end;
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user