Introduce core.panic, a new architecture-agnostic kernel panic engine
with a pre-allocated LVGL BSOD screen. The screen and all widgets are
created at init time so that zero LVGL allocation occurs at panic time.
Layout features:
- Top banner with decoded teapot TGA image (128x128) and title/subtitle
- Two-column content area with dark semi-transparent cards:
- Left: Fault Details, CPU Registers, Process Info, System Info
- Right: Call Stack (full height)
- Pastel red background (#7A2828), monospace text for data sections
Key changes:
- Add core.panic.pas with pre-built BSOD screen, register/trace/system
info formatting, hex conversion helpers, and syslog fallback
- Add arch.x86.panic.pas as the x86 bridge: packs interrupt registers
into a TRegisterSnapshot and calls core.panic.panic()
- Simplify all 19 x86 fault handlers to one-liner panic calls
- Remove legacy BSOD code from arch.x86.util.pas
- Add teapot.tga (256x256) embedded via splash_tga.asm
- Add LVGL bindings: lv_refr_now, lv_image_create, lv_image_set_src,
lv_image_set_scale, lv_image_set_inner_align, and style helpers
- Wire up panic init and test command in asuro.pas
Removes per-lookup heap allocation (MD5Buffer/kfree) in favour of a
single zero-allocation FNV-1a32 pass. Drops core.enc.md5 dependency
from core.ds.hashmap.
- core.enc.fnv1a: FNV-1a 32/64-bit non-cryptographic hash with UnitTest
- core.enc.djb2: DJB2 XOR/Add 32/64-bit hash variants with UnitTest
- core.ds.bloom: probabilistic bloom filter (Bloom_New/Add/Test/Clear/Free)
using double hashing (FNV-1a32 + DJB2_32) with UnitTest
- core.ds.types: add TBloomFilter / PBloomFilter record
- asuro.pas: wire all three UnitTests into boot test suite
admin
t3hn3rd
Aaron