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Author SHA1 Message Date
t3hn3rd 8b4335768b refactor(memory): complete PMM/VMM/LMM rewrite - bitmap allocators, bug fixes, hardening
continuous-integration/drone/push Build is passing
continuous-integration/drone/pr Build is passing
PMM Rewrite:
- Replace ~8KB record array with compact bitmaps
  (PhysPresent/PhysAlloc/PhysScanned, 128B each)
- Add PhysOwner[0..1023] for per-block ownership tracking
- new_block: O(1) amortised via NextFreeHint + dword-level BSF scan,
  returns 0 as OOM sentinel
- free_block: O(1) direct bit clear with double-free detection
- alloc_block: validates PhysPresent and PhysAlloc bits before allocation
- Add pmm_free_blocks/pmm_total_blocks stats functions

VMM Correctness Fixes:
- Fix free_page block extraction (Address SHR 10, was using
  raw Address field)
- Fix invlpg operand (use virtual address, was passing PDE index)
- Clear PDE entry on free_page before returning block to PMM
- Remove map_page double-write (delegate to map_page_ex only)
- Add OOM propagation (new_page returns false if PMM returns 0)
- Fix missing pop_trace in new_page error path

LMM Rewrite:
- Replace per-entry record array with bitmap allocator
  (93% vs 43% page efficiency)
- Layout: Header(24B) + Bitmap(64512B) + Padding + Data at 0x10000
- SIZE_PREFIX=16 for 16-byte aligned returns (SSE MOVAPS requirement)
- Next-fit bitmap scan with roving hint (NextFree) and dword-level
  fast skip
- Large alloc sentinel (LARGE_ALLOC_MAGIC=$FFFFFFFE) so kfree detects
  klalloc'd memory
- Implement klfree (was previously a no-op - pages could never
  be returned)
- Implement try_release_page (return fully-free heap pages to VMM/PMM)
- Fix interrupt safety: stack-balanced pushfd/cli/pop +
  restore_if (sti only)
  Fixes Bad TSS caused by popfd restoring dangerous EFLAGS bits (NT, IOPL)
- Zero memory via rep stosd instead of byte-by-byte loop

Hardening:
- kalloc OOM now triggers BSOD instead of returning nil
  (90% of callers don't check)
- Double-free detection in kfree (verify bitmap bits set before clearing)
- Guard bytes ({$IFDEF DEBUG_LMM}): $DEADBEEF sentinel for buffer overrun detection
- kpalloc: bounds check (block >= 1024 -> GPF) + syslog MMIO mapping audit log

Observability:
- Add MEMINFO command as src/prog/meminfo.pas (moved from inline kernel.pas)
- Displays multiboot memory, PMM block stats, LMM heap stats
- Register via progmanager.pas following standard prog pattern

Files changed:
- src/pmemorymanager.pas
- src/vmemorymanager.pas
- src/lmemorymanager.pas
- src/kernel.pas
- src/progmanager.pas
- src/prog/meminfo.pas
2026-03-04 10:36:09 +00:00
113 changed files with 3801 additions and 28124 deletions

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-2
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@@ -14,7 +14,5 @@ localenv.json
/lvgl/
dockerout.txt
AGENTS.md
lessons_learnt.md
*.log
/doc/*.md
wasuro
-1
View File
@@ -24,7 +24,6 @@ declare -a run_steps=(
"compile_stub.sh" "Failed to compile stub!"
"compile_vergen.sh" "Versions failed to compile"
"compile_lvgl.sh" "Failed to compile LVGL!"
"compile_wasuro.sh" "Failed to pull Wasuro!"
"compile_sources.sh" "Failed to compile FPC Sources!"
"compile_link.sh" "Failed linking!"
"compile_isogen.sh" "Failed to create ISO!"
+7 -21
View File
@@ -1,7 +1,7 @@
#!/usr/bin/env bash
# compile_lvgl.sh — Download LVGL v9.2 source and compile into lib/liblvgl.a
# Clone & compile in /tmp (fast container-local fs).
# Cache liblvgl.a on host mount (/code/lvgl/) to skip rebuild.
# Copy source + objects to /lvgl (host mount) for debugging.
set -e
LVGL_VERSION="v9.2.2"
@@ -10,7 +10,6 @@ LVGL_DIR="/tmp/lvgl"
OBJ_DIR="/tmp/lvgl_obj"
CONF_DIR="$(pwd)/lvglh"
OUT_DIR="$(pwd)/lib"
CACHE_DIR="/code/lvgl"
CC="gcc"
CFLAGS="-m32 -march=i686 -ffreestanding \
@@ -27,17 +26,6 @@ echo " "
echo "Compiling LVGL..."
echo " "
# If cached liblvgl.a exists on host mount, just copy it and skip everything
if [ -f "${CACHE_DIR}/liblvgl.a" ]; then
echo "Found cached liblvgl.a in ${CACHE_DIR}, copying to ${OUT_DIR}..."
cp "${CACHE_DIR}/liblvgl.a" "${OUT_DIR}/liblvgl.a"
echo "(Delete lvgl/liblvgl.a to force a full rebuild.)"
echo " "
echo "LVGL compilation complete (cached)."
echo " "
exit 0
fi
# Clone LVGL into /tmp (container-local)
rm -rf "$LVGL_DIR"
echo "Downloading LVGL ${LVGL_VERSION}..."
@@ -117,14 +105,12 @@ else
echo "No custom LVGL files in lvglh/."
fi
# Cache liblvgl.a and source to host mount for next build
echo "Caching LVGL to host mount..."
mkdir -p "$CACHE_DIR"
rm -rf ${CACHE_DIR}/* ${CACHE_DIR}/.[!.]* ${CACHE_DIR}/..?* 2>/dev/null || true
cp "${OUT_DIR}/liblvgl.a" "${CACHE_DIR}/liblvgl.a"
cp -a "$LVGL_DIR/src" "${CACHE_DIR}/src"
cp -a "$LVGL_DIR"/*.h "${CACHE_DIR}/" 2>/dev/null || true
cp -a "$OBJ_DIR" "${CACHE_DIR}/obj"
# Copy source + objects to /lvgl host mount for debugging
echo "Copying LVGL source and objects to host mount..."
mkdir /code/lvgl 2>/dev/null || true
rm -rf /code/lvgl/* /code/lvgl/.[!.]* /code/lvgl/..?* 2>/dev/null || true
cp -a "$LVGL_DIR/src" /code/lvgl/src
cp -a "$OBJ_DIR" /code/lvgl/obj
echo "Done."
echo " "
+1 -7
View File
@@ -4,10 +4,4 @@ echo "======================="
echo " "
echo "Compiling FPC Sources..."
echo " "
# Build -Fu flags for all directories under src/ and wasuro/
FU_PATHS="-Fusrc -Fuwasuro"
for dir in $(find src wasuro -type d 2>/dev/null); do
FU_PATHS="$FU_PATHS -Fu$dir"
done
fpc -Aelf -gw -g -gl -n -v0e -O3 -OpPENTIUM3 -Si -Sc -Sg -Xd -CX -XXs -CfSSE -CfSSE2 -Rintel -Pi386 -Tlinux -FElib/ $FU_PATHS src/kernel.pas
fpc -Aelf -gw -g -gl -n -v0ew -O3 -OpPENTIUM3 -Si -Sc -Sg -Xd -CX -XXs -CfSSE -CfSSE2 -Rintel -Pi386 -Tlinux -FElib/ -Fusrc/* -Fusrc/driver/* -Fusrc/driver/net/* -Fusrc/driver/bus/* -Fusrc/driver/bus/usb/* -Fusrc/driver/hid/* src/kernel.pas
-1
View File
@@ -5,4 +5,3 @@ echo " "
echo "Compiling Stub..."
echo " "
nasm -f elf src/stub/stub.asm -o lib/stub.o
nasm -f elf src/stub/splash_tga.asm -o lib/splash_tga.o
-43
View File
@@ -1,43 +0,0 @@
#!/usr/bin/env bash
# compile_wasuro.sh — Pull Wasuro WASM runtime source into wasuro/
# Clones the repo (sparse, src/wasm only) and copies the Pascal sources
# into $PWD/wasuro so the FPC build can reference them via -Fu.
set -e
WASURO_REPO="https://gitea.spexeah.com/Spexeah/Wasuro.git"
WASURO_BRANCH="develop"
WASURO_TMP="/tmp/wasuro"
WASURO_OUT="$(pwd)/wasuro"
echo " "
echo "======================="
echo " "
echo "Pulling Wasuro WASM runtime..."
echo " "
# Skip if wasuro/ already has .pas files (cached from previous build)
if [ -n "$(find "${WASURO_OUT}" -name '*.pas' 2>/dev/null | head -1)" ]; then
echo "Wasuro sources already present in ${WASURO_OUT}, skipping pull."
echo " "
exit 0
fi
# Clone sparse checkout (only src/wasm)
rm -rf "$WASURO_TMP"
git clone --depth 1 --branch "${WASURO_BRANCH}" --filter=blob:none --sparse \
"${WASURO_REPO}" "${WASURO_TMP}" 2>&1
cd "$WASURO_TMP"
git sparse-checkout set src/wasm 2>&1
cd -
echo "Copying src/wasm to ${WASURO_OUT}..."
rm -rf "$WASURO_OUT"
mkdir -p "$WASURO_OUT"
cp -a "${WASURO_TMP}/src/wasm/"* "$WASURO_OUT"/
rm -rf "$WASURO_TMP"
TOTAL=$(find "$WASURO_OUT" -name '*.pas' | wc -l)
echo "Copied ${TOTAL} Pascal source files."
echo " "
echo "Wasuro pull complete."
echo " "
-32
View File
@@ -1,32 +0,0 @@
#Flat filesystem
A super simple filesystem for asuro. Folders are emulated in filenames.
Starts with disk info sector, sector 0 of volume
---
#### disk info
jmp2boot : ubit24;
OEMName : array[0..7] of char;
version : uint16 // numerical version of filesystem
sectorCount : uint16;
fileCount : uint16
signature : uint32 = 0x0B00B1E5
the Rest of the sector is reserved
---
Starting from sector 1 is the file table. Table size is determined by entry size (64) * fileCount
---
####File entry
name : array[0..59] of char //file name max 60 chars
fileStart : 16bit // start sector of data
fileSize : 16bit // data size in sectors
---
BIN
View File
Binary file not shown.

Before

Width:  |  Height:  |  Size: 1.0 MiB

Generated
-1
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@@ -1 +0,0 @@
Hello from the Asuro ISO!
+3 -109
View File
@@ -13,120 +13,14 @@
// limitations under the License.
{
ContextSwitcher - Custom IRQ0 handler for preemptive context switching.
ContextSwitcher - Switch Process Contexts when preempted.
Replaces the default ISR_32 with a naked assembly stub that saves the
interrupted context (PUSHAD + segment regs), calls a Pascal helper to
dispatch timer hooks, send EOI, and run the scheduler, then restores
the next process context (or idles) via the returned ESP.
@author(Kieron Morris <[email protected]>)
@author(Kieron Morris <[email protected]>)
}
unit contextswitcher;
{$ASMMODE intel}
interface
uses
idt, isrmanager, processmanager, proctypes, util, syslog, tracer;
{ Initialise: overwrite IDT gate 32 with our custom ISR. }
procedure init;
{ No idle ESP variable needed — idle is now a formal process (PID 0)
with its SavedESP managed like any other process. }
implementation
{ -----------------------------------------------------------------------
do_context_switch_work
Pascal helper called from the assembly ISR. Receives the current ESP
(pointing to the GS..EFLAGS save area), dispatches timer hooks, sends
EOI, runs the scheduler and returns the ESP for the next context.
Uses register calling convention: saved_esp in EAX, result in EAX.
----------------------------------------------------------------------- }
function do_context_switch_work(saved_esp : uint32) : uint32;
var
next : PProcessContext;
begin
{ 1. Save ESP into the current process }
processmanager.CurrentProcess^.SavedESP := saved_esp;
{ 2. Dispatch all hooks registered on interrupt 32 (timer hooks).
This fires TMR_0_ISR.Main which in turn fires BDA tick,
graphics refresh, USB hotplug, etc. }
isrmanager.dispatchHooks(32);
{ 3. Send End-Of-Interrupt to the master PIC }
outb($20, $20);
{ 4. Pick the next process to run (always returns non-nil; idle as fallback) }
next := processmanager.scheduler_pick_next;
processmanager.CurrentProcess := next;
{ 5. Return the selected process ESP }
do_context_switch_work := next^.SavedESP;
end;
{ -----------------------------------------------------------------------
context_switch_isr
Naked assembly ISR that replaces ISR_32 (IRQ0 / PIT timer).
Stack on entry (pushed by CPU):
[ESP+8] EFLAGS
[ESP+4] CS
[ESP+0] EIP
We push general-purpose and segment registers, call the Pascal helper,
switch ESP to the returned value, pop registers and IRETD.
----------------------------------------------------------------------- }
procedure context_switch_isr; assembler; nostackframe;
asm
{ Save all general-purpose registers (EAX,ECX,EDX,EBX,ESP,EBP,ESI,EDI) }
pushad
{ Save segment registers }
push ds
push es
push fs
push gs
{ Load kernel data segments }
mov ax, $10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
{ Call Pascal helper: EAX = current ESP (register calling convention).
Returns new ESP in EAX. }
mov eax, esp
call do_context_switch_work
mov esp, eax
{ Restore segment registers }
pop gs
pop fs
pop es
pop ds
{ Restore general-purpose registers }
popad
{ Return from interrupt }
iretd
end;
{ -----------------------------------------------------------------------
init
Override IDT gate 32 with our custom ISR. Must be called AFTER
isrmanager.init so that the default gate has been set up first.
----------------------------------------------------------------------- }
procedure init;
begin
idt.set_gate(32, uint32(@context_switch_isr), $08, ISR_RING_0);
tracer.push_trace('contextswitcher.init');
end;
implementation;
end.
+5 -2
View File
@@ -22,7 +22,7 @@ unit cpu;
interface
uses
util, RTC, stdio;
util, RTC;
type
PCapabilities_Old = ^TCapabilities_Old;
@@ -113,10 +113,12 @@ var
CAP_OLD, CAP_NEW : uint32;
procedure init();
procedure Terminal_Command_CPU(Params : PParamList; stdin_buf, stdout_buf, stderr_buf : POutBuf);
implementation
uses
stdio;
procedure getCPUIdentifier;
var
id0, id1, id2 : uint32;
@@ -323,6 +325,7 @@ end;
procedure init();
begin
stdio.registerCommand('CPU', @Terminal_Command_CPU, 'CPU Info.');
CPUID.Capabilities0:= PCapabilities_Old(@CAP_OLD);
CPUID.Capabilities1:= PCapabilities_New(@CAP_NEW);
getCPUIdentifier;
-31
View File
@@ -91,7 +91,6 @@ function getDeviceInfo(class_code : uint8; subclass_code : uint8; prog_if : uint
procedure requestConfig(bus : uint8; slot : uint8; func : uint8; row : uint8);
procedure writeConfig(bus: uint8; slot : uint8; func : uint8; row : uint8; val : uint32);
procedure setBusMaster(bus : uint8; slot : uint8; func : uint8; master : boolean);
procedure enableDevice(bus : uint8; slot : uint8; func : uint8);
implementation
@@ -443,34 +442,4 @@ begin
pop_trace;
end;
//Enable device inturrupts and set bus master
procedure enableDevice(bus : uint8; slot : uint8; func : uint8);
var
addr : uint32;
cmd : uint32;
begin
push_trace('PCI.enableDevice');
addr := ($1 shl 31);
addr := addr or (bus shl 16);
addr := addr or ((slot) shl 11);
addr := addr or ((func) shl 8);
addr := addr or ($04 and $FC);
outl(PCI_CONFIG_ADDRESS_PORT, addr);
cmd := inl(PCI_CONFIG_DATA_PORT);
cmd := cmd or PCI_COMMAND_MEM_SPACE;
cmd := cmd or PCI_COMMAND_BUS_MASTER;
cmd := cmd or (3 shl 1);
//enable interrupts, remove disable interrupt bit maybe
cmd := cmd and not PCI_COMMAND_INT_DISABLE;
// cmd := cmd and not (1 shl 9);
outl(PCI_CONFIG_ADDRESS_PORT, addr);
outl(PCI_CONFIG_DATA_PORT, cmd);
pop_trace;
end;
end.
+2 -7
View File
@@ -158,9 +158,6 @@ procedure init;
{ Unit Tests }
procedure UnitTest;
{ Terminal command }
procedure terminal_command_usb(params : PParamList; stdin_buf, stdout_buf, stderr_buf : POutBuf);
implementation
{ ========================= Globals ========================= }
@@ -957,14 +954,11 @@ end;
procedure usb_check_hotplug;
var
i : uint32;
count: uint32;
hc : PUSBHCDriver;
port : uint8;
begin
if HCList = nil then exit;
count := LL_Size(HCList);
if count = 0 then exit;
for i := 0 to count - 1 do begin
for i := 0 to LL_Size(HCList) - 1 do begin
hc := PUSBHCDriver(LL_Get(HCList, i));
if (hc <> nil) and hc^.PortChangePending then begin
hc^.PortChangePending := false;
@@ -1106,6 +1100,7 @@ begin
CompletionHookCount := 0;
for i := 0 to MAX_COMPLETION_HOOKS - 1 do
CompletionHooks[i] := nil;
stdio.registerCommand('USB', @terminal_command_usb, 'USB subsystem information.');
syslog.logln('USB Core', 'INIT END.');
pop_trace;
end;
+1 -5
View File
@@ -119,12 +119,8 @@ var
x32, y32 : sint32;
r : pchar;
begin
{ mouse_wait(0) checks OBF with a short timeout (100 iterations).
When it returns true, data is ready — read it directly with inb($60).
Do NOT call mouse_read here: it uses mouse_wait_long (100k iterations)
and would spin-block the ISR if the next packet byte hasn't arrived yet. }
while mouse_wait(0) do begin
b := inb($60);
b := mouse_read;
if Cycle = 0 then begin
if (b AND $08) = $08 then begin
Mouse_Byte[Cycle] := b;
-24
View File
@@ -21,29 +21,6 @@ unit drivertypes;
interface
const
PCI_CONFIG_ADDRESS_PORT = $0CF8;
PCI_CONFIG_DATA_PORT = $0CFC;
PCI_COMMAND_IO_SPACE = $0001;
PCI_COMMAND_MEM_SPACE = $0002;
PCI_COMMAND_BUS_MASTER = $0004;
PCI_COMMAND_SPECIAL_CYC = $0008;
PCI_COMMAND_MEM_WRITE = $0010;
PCI_COMMAND_VGA_PALETTE = $0020;
PCI_COMMAND_PARITY = $0040;
PCI_COMMAND_WAIT = $0080;
PCI_COMMAND_SERR = $0100;
PCI_COMMAND_FAST_BACK = $0200;
PCI_COMMAND_INT_DISABLE = $0400;
PCI_COMMAND_SERR_ENABLE = $8000;
PCI_CAP_ID_MSI = $05;
// Bits in the MSI Control register (16-bit):
MSI_CONTROL_ENABLE = 1 shl 0; // Bit 0
MSI_CONTROL_64BIT = 1 shl 7; // Bit 7
MSI_CONTROL_PVMASK = 1 shl 8; // Bit 8 (optional: per-vector masking)
type
PPCI_Device = ^TPCI_Device;
@@ -67,7 +44,6 @@ type
address1 : uint32;
address2 : uint32;
address3 : uint32;
address4 : uint32;
address5 : uint32;
CIS_pointer : uint32;
File diff suppressed because it is too large. Load diff
+4 -5
View File
@@ -100,8 +100,8 @@ end;
procedure send(p_data : void; p_len : uint16);
begin
push_trace('net.send');
writeToLogLn('L1/NET: send');
//push_trace('net.send');
//writeToLogLn('L1: net.send');
if CBSend <> nil then CBSend(p_data, p_len);
pop_trace;
end;
@@ -111,7 +111,8 @@ var
context : PPacketContext;
begin
push_trace('net.recv');
//push_trace('net.recv');
//writeToLogLn('L1: net.recv');
context:= newPacketContext;
if CBNext <> nil then CBNext(p_data, p_len, context);
freePacketContext(context);
@@ -128,7 +129,6 @@ end;
procedure init;
begin
push_trace('net.init');
writeToLogLn('L1/NET: init');
//l2
eth2.register;
//l3
@@ -136,7 +136,6 @@ begin
ipv4.register;
//l4
icmp.register;
tcp.register;
udp.register;
//l5
dhcp.register;
+1 -4
View File
@@ -46,7 +46,6 @@ var
procedure registerTypePromisc(eType : uint16; RecvCB : TRecvCallback);
begin
push_trace('eth2.registerTypePromisc');
register;
if EthTypes[eType] = nil then EthTypes[eType]:= RecvCB;
Promisc[eType]:= true;
@@ -54,7 +53,6 @@ end;
procedure registerType(eType : uint16; RecvCB : TRecvCallback);
begin
push_trace('eth2.registerType');
register;
if EthTypes[eType] = nil then EthTypes[eType]:= RecvCB;
end;
@@ -95,7 +93,7 @@ var
buf : puint8;
begin
push_trace('eth2.recv');
//writeToLogLn(' L2: eth2.recv');
buf:= puint8(p_data);
Header:= PEthernetHeader(buf);
@@ -122,7 +120,6 @@ var
begin
push_trace('eth2.register');
if not Registered then begin
writeToLogLn(' L2/ETH: register');
for i:=0 to 65535 do begin
EthTypes[i]:= nil;
Promisc[i]:= false;
+3 -12
View File
@@ -25,7 +25,7 @@ uses
tracer, lmemorymanager,
util, lists,
net, nettypes, netutils,
eth2, ipv4, stdio;
eth2, ipv4;
type
PARPCacheRecord = ^TARPCacheRecord;
@@ -41,12 +41,11 @@ procedure sendGratuitous;
procedure sendRequest(ip : puint8);
procedure send(hType : uint16; pType : uint16; op : uint16; p_context : PPacketContext);
function resolveIP(ip : puint8) : puint8;
procedure terminal_command_arp(Params : PParamList; stdin_buf, stdout_buf, stderr_buf : POutBuf);
implementation
uses
strings;
stdio, strings;
var
Registered : Boolean = false;
@@ -97,7 +96,6 @@ var
hSize, pSize : uint8;
begin
push_trace('arp.send');
if p_context <> nil then begin
buf:= kalloc(sizeof(TARPHeader));
hdr:= PARPHeader(buf);
@@ -137,8 +135,6 @@ var
context : PPacketContext;
begin
push_trace('arp.sendGratuitous');
writeToLogLn(' L3/ARP: sendGratuitous');
context:= newPacketContext;
CopyIPv4(@getIPv4Config^.Address[0], @context^.IP.Destination[0]);
CopyIPv4(@getIPv4Config^.Address[0], @context^.IP.Source[0]);
@@ -154,7 +150,6 @@ var
CacheRecord : PARPCacheRecord;
begin
push_trace('arp.sendRequestGateway');
context:= newPacketContext;
CacheRecord:= findCacheRecordByIP(@getIPv4Config^.Gateway[0]);
if CacheRecord <> nil then begin
@@ -173,8 +168,6 @@ var
CacheRecord : PARPCacheRecord;
begin
push_trace('arp.sendRequest');
writeToLogLn(' L3/ARP: sendRequest');
context:= newPacketContext;
CopyIPv4(ip, @context^.IP.Destination[0]);
CopyIPv4(@getIPv4Config^.Address[0], @context^.IP.Source[0]);
@@ -191,7 +184,6 @@ var
CacheRecord : PARPCacheRecord;
begin
push_trace('arp.resolveIP');
CacheRecord:= findCacheRecordByIP(ip);
resolveIP:= nil;
if CacheRecord = nil then begin
@@ -211,7 +203,6 @@ var
context : PPacketContext;
begin
push_trace('arp.recv');
{ Get our converted Header }
Header:= PARPHeader(p_data);
AHeader.Hardware_Type:= (Header^.Hardware_Type_Hi SHL 8) + Header^.Hardware_Type_Lo;
@@ -307,9 +298,9 @@ procedure register;
begin
push_trace('arp.register');
if not Registered then begin
writeToLogLn(' L3/ARP: register');
Cache:= LL_New(sizeof(TARPCacheRecord));
eth2.registerTypePromisc($0806, @recv);
stdio.registerCommand('ARP', @terminal_command_arp, 'Get ARP Table.');
Registered:= true;
end;
pop_trace;
+3 -10
View File
@@ -26,18 +26,17 @@ uses
util, strings,
net, nettypes, netutils,
lists,
eth2, stdio;
eth2;
procedure send(p_data : void; p_len : uint16; p_context : PPacketContext);
procedure registerProtocol(Protocol_ID : uint8; recv_callback : TRecvCallback);
function getIPv4Config : PIPv4Configuration;
procedure register;
procedure terminal_command_ifconfig(params : PParamList; stdin_buf, stdout_buf, stderr_buf : POutBuf);
implementation
uses
arp;
arp, stdio;
var
Registered : Boolean = false;
@@ -47,9 +46,7 @@ var
function getIPv4Config : PIPv4Configuration;
begin
push_trace('ipv4.getIPv4Config');
getIPv4Config:= @Config;
pop_trace;
end;
procedure send(p_data : void; p_len : uint16; p_context : PPacketContext);
@@ -60,7 +57,6 @@ var
buffer : void;
begin
push_trace('ipv4.send');
inc(CurrentID);
Header.version:= 4;
Header.header_len:= 5;
@@ -88,7 +84,6 @@ begin
memcpy(uint32(p_data), uint32(Buffer) + (Header.header_len * 4), p_len);
eth2.send(Buffer, (Header.header_len * 4) + p_len, $0800, p_context);
kfree(Buffer);
pop_trace;
end;
procedure recv(p_data : void; p_len : uint16; p_context : PPacketContext);
@@ -100,7 +95,6 @@ var
len : uint16;
begin
push_trace('ipv4.recv');
Header:= PIPV4Header(p_data);
AHeader.version:= Header^.version;
AHeader.header_len:= Header^.header_len;
@@ -201,7 +195,6 @@ var
begin
push_trace('ipv4.register');
if not Registered then begin
writeToLogLn(' L3/IPv4: register');
for i:=0 to 255 do begin
Protocols[i]:= nil;
end;
@@ -212,6 +205,7 @@ begin
end;
Config.UP:= false;
eth2.registerType($0800, @recv);
stdio.registerCommand('IFCONFIG', @terminal_command_ifconfig, 'Configure Network Settings.');
Registered:= true;
end;
pop_trace;
@@ -219,7 +213,6 @@ end;
procedure registerProtocol(Protocol_ID : uint8; recv_callback : TRecvCallback);
begin
push_trace('ipv4.registerProtocol');
register;
if Protocols[Protocol_ID] = nil then Protocols[Protocol_ID]:= recv_callback;
pop_trace;
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