starting to work

src/driver/bus/PCI.pas

@@ -461,9 +461,11 @@ begin
     cmd := inl(PCI_CONFIG_DATA_PORT);
     cmd := cmd or PCI_COMMAND_MEM_SPACE;
     cmd := cmd or PCI_COMMAND_BUS_MASTER;
+    cmd := cmd or (3 shl 1);
 
     //enable interrupts, remove disable interrupt bit
     cmd := cmd and not PCI_COMMAND_INT_DISABLE;
+    cmd := cmd and not (1 shl 9);
 
     outl(PCI_CONFIG_ADDRESS_PORT, addr);
     outl(PCI_CONFIG_DATA_PORT, cmd);

src/driver/storage/AHCI/AHCITypes.pas

@@ -80,6 +80,7 @@ type
         sata_noti: uint32;      // SATA Notification
         fis_switch_ctrl: uint32;// FIS-based Switch Control
         rsv1: array[0..10] of uint32;
+        vendor: array[0..3] of uint32;
     end;
 
     PHBA_Port = ^THBA_Port;
@@ -102,8 +103,16 @@ type
         em_control: uint32;     // Enclosure Management Control
         capabilites2: uint32;   // Host Capabilities Extended
         bohc: uint32;           // BIOS/OS Handoff Control and Status
-        rsv0: array[0..$210] of boolean;
+
+        //0x2c to 0x9f reserved
+        rsv0: array[0..115] of uint8;
+
+        //vendor specific
+        vendor: array[0..95] of uint8;
+
+        //port registers
         ports: array[0..31] of THBA_Port;
+      
     end;
 
     PHBA_Memory = ^THBA_Memory;
@@ -145,7 +154,10 @@ type
     }
     THBA_FIS_REG_H2D = bitpacked record 
         fis_type: uint8;         // FIS Type
-        pmport: uint8;           // Port Multiplier Port
+        // pmport: uint8;           // Port Multiplier Port is pmport:4 and rsv0:3 and i:1
+        pmport: ubit4;           // Port Multiplier Port
+        rsv: ubit3;             // Reserved
+        c: ubit1;                // command or control
         command: uint8;          // Command
         featurel: uint8;         // Feature Lower 8-bits
         lba0: uint8;             // LBA0
@@ -160,7 +172,7 @@ type
         counth: uint8;           // Count Upper 8-bits
         icc: uint8;              // Isochronous Command Completion
         control: uint8;          // Control
-        rsv0: array[0..2] of uint8;
+        rsv0: array[0..3] of uint8;
     end;
 
     PHBA_FIS_REG_H2D = ^THBA_FIS_REG_H2D;
@@ -171,19 +183,22 @@ type
         AHCI Host Bus Adapter (HBA) Command Header Interface
     }
     THBA_CMD_HEADER = bitpacked record 
-        cmd_fis_length: uint8;   // Command FIS Length
-        atapi: uint8;            // ATAPI
-        wrt: uint8;            // Write
-        prefetchable: uint8;     // Prefetchable
-        reset: uint8;            // Reset
-        bist: uint8;             // BIST
-        clear_busy: uint8;       // Clear Busy
-        reserved0: uint8;        // Reserved
+        cmd_fis_length: UBit5;   // Command FIS Length
+        atapi: UBit1;            // ATAPI
+        wrt: UBit1;            // Write
+        prefetchable: UBit1;     // Prefetchable
+
+        reset: UBit1;            // Reset
+        bist: UBit1;             // BIST
+        clear_busy: UBit1;       // Clear Busy
+        reserved0: UBit1;        // Reserved
+        port_multiplier: UBit4;  // Port Multiplier Port
+
         prdtl: uint16;           // Physical Region Descriptor Table Length
         prdbc: uint32;           // Physical Region Descriptor Byte Count
         cmd_table_base: uint32;  // Command Table Base Address
         cmd_table_baseu: uint32; // Command Table Base Address Upper 32-bits
-        rsv0: array[0..4] of uint32;
+        rsv0: array[0..3] of uint32;
     end;
 
     PHBA_CMD_HEADER = ^THBA_CMD_HEADER;
@@ -195,8 +210,8 @@ type
         dba: uint32;             // Data Base Address
         dbau: uint32;            // Data Base Address Upper 32-bits
         rsv0: uint32;            // Reserved
-        reserved: ubit9;         // Reserved
         dbc: ubit22;             // Data Byte Count
+        reserved: ubit9;         // Reserved
         int: ubit1;        // Interrupt
         // dbc: uint32;             // Data Byte Count, bit 1 is Interrupt, then 22 bits of Byte Count, then 9 bits of Reserved
     end;
@@ -211,7 +226,7 @@ type
         cmd_fis: array[0..63] of uint8; // Command FIS
         acmd: array[0..15] of uint8;    // ATAPI Command
         rsv0: array[0..47] of uint8;
-        prdt: TPRDT;                    // Physical Region Descriptor Table
+        prdt: array[0..31] of THBA_PRD;                    // Physical Region Descriptor Table
     end;
 
     PHBA_CMD_TABLE = ^THBA_CMD_TABLE;
@@ -227,8 +242,8 @@ type
         Device type enum
     }
     TDeviceType = (
-        SATA,
-        ATAPI,
+        SATA = 1,
+        ATAPI = 2,
         SEMB,
         PM
     );